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RH850 Datasheet(PDF) 13 Page - Renesas Technology Corp

Part # RH850
Description  Renesas microcontroller
PDF  72 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

RH850 Datasheet(HTML) 13 Page - Renesas Technology Corp

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R01DS0505ED0100 Rev.1.00
September 30, 2025
RH850/P1M-E
Section 2 Pin Functions
2.
1.2
Pin Function
name
Table 2.2 lists functions of each pin. “Port number” in the table indicates that the function is
supported, while “―” indicates that the function is not supported. Do not use the pin function that is
not supported.
Table 2.2
Pin Function (1/16)
Category
Pin name
IO
Function
Alternative Port
100-pin
144-pin
eVR
DPS
eVR
DPS
NMI
NMI
I
External non-maskable interrupt input
P3_14
P3_14
P3_14
P3_14
INTP
INTP0
I
External interrupt input 0
P3_7/
P2_5/
P0_2/
P5_0/
P4_5
P3_7/
P2_5/
P0_2/
P5_0/
P4_5
P3_7/
P2_5/
P0_2/
P5_0/
P4_5
P3_7/
P2_5/
P0_2/
P5_0/
P4_5
INTP1
I
External interrupt input 1
P2_8/
P5_5
P2_8/
P5_5
P2_8/
P5_5
P2_8/
P5_5
INTP2
I
External interrupt input 2
P0_2/
P3_4
P0_2/
P3_4
P0_2/
P3_4/
P5_8
P0_2/
P3_4/
P5_8
INTP3
I
External interrupt input 3
P3_4/
P1_1/
P5_14/
P5_10/
P4_0
P3_4/
P1_1/
P5_14/
P5_10/
P4_0
P3_4/
P1_1/
P5_14/
P5_10/
P4_0
P3_4/
P1_1/
P5_14/
P5_10/
P4_0
INTP4
I
External interrupt input 4
P2_5/
P0_1
P2_5/
P0_1
P2_5/
P0_1/
P5_15/
P5_12
P2_5/
P0_1/
P5_15/
P5_12
INTP5
I
External interrupt input 5
P3_7/
P2_0/
P4_5
P3_7/
P2_0/
P4_5
P3_7/
P2_0/
P4_5
P3_7/
P2_0/
P4_5
INTP6
I
External interrupt input 6
P3_12/
P2_2/
P4_2
P3_12/
P2_2/
P4_2
P3_12/
P2_2/
P4_7/
P4_2
P3_12/
P2_2/
P4_7/
P4_2
INTP7
I
External interrupt input 7
P3_14
P3_14
P3_14
P3_14
INTP8
I
External interrupt input 8
P0_2/
P4_4
P0_2/
P4_4
P0_2/
P4_4
P0_2/
P4_4
INTP9
I
External interrupt input 9
P0_13
P0_13
P0_13
P0_13
INTP10
I
External interrupt input 10
P5_6
P5_6
P5_6
P5_6
INTP11
I
External interrupt input 11
P4_2
P4_2
P4_8/
P4_2
P4_8/
P4_2
INTP12
I
External interrupt input 12
P4_3
P4_3
P4_11/
P4_3
P4_11/
P4_3
TAUD0
TAUD0I0
I
TAUD0 channel input 0
P3_5
P3_5
P3_5
P3_5
TAUD0I1
I
TAUD0 channel input 1
P5_0
P5_0
P5_0
P5_0
TAUD0I2
I
TAUD0 channel input 2
P5_1
P5_1
P5_1
P5_1
TAUD0I3
I
TAUD0 channel input 3
P5_1
P5_1
P5_1
P5_1
TAUD0I4
I
TAUD0 channel input 4
P5_4
P5_4
P5_4
P5_4
TAUD0I5
I
TAUD0 channel input 5
P5_4
P5_4
P5_4
P5_4



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