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RH850 Datasheet(PDF) 21 Page - Renesas Technology Corp |
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RH850 Datasheet(HTML) 21 Page - Renesas Technology Corp |
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21 / 72 page  Page 21 of 72 R01DS0505ED0100 Rev.1.00 September 30, 2025 RH850/P1M-E Section 2 Pin Functions CSIH1 CSIH1SCO O CSIH1 serial clock output signal P2_9/ P4_1 P2_9/ P4_1 P2_9/ P4_1 P2_9/ P4_1 CSIH1SI I CSIH1 serial data input P2_7/ P3_14 P2_7/ P3_14 P2_7/ P3_14 P2_7/ P3_14 CSIH1SO O CSIH1 serial data output P2_8/ P4_0 P2_8/ P4_0 P2_8/ P4_0 P2_8/ P4_0 CSIH2 CSIH2CSS0 O CSIH2 serial peripheral chip select signal 0 P2_3/ P1_1 P2_3/ P1_1 P2_3/ P1_1/ P4_7/ P5_2 P2_3/ P1_1/ P4_7/ P5_2 CSIH2CSS1 O CSIH2 serial peripheral chip select signal 1 P3_3/ P5_0 P3_3/ P5_0 P3_3/ P5_0/ P4_8 P3_3/ P5_0/ P4_8 CSIH2CSS2 O CSIH2 serial peripheral chip select signal 2 P3_4/ P5_1 P3_4/ P5_1 P3_4/ P5_1/ P4_9 P3_4/ P5_1/ P4_9 CSIH2CSS3 O CSIH2 serial peripheral chip select signal 3 P3_5/ P5_4 P3_5/ P5_4 P3_5/ P5_4/ P4_10 P3_5/ P5_4/ P4_10 CSIH2CSS4 O CSIH2 serial peripheral chip select signal 4 P3_6/ P5_5 P3_6/ P5_5 P3_6/ P5_5/ P4_11 P3_6/ P5_5/ P4_11 CSIH2CSS5 O CSIH2 serial peripheral chip select signal 5 P3_7/ P5_6 P3_7/ P5_6 P3_7/ P5_6/ P4_12 P3_7/ P5_6/ P4_12 CSIH2CSS6 O CSIH2 serial peripheral chip select signal 6 P3_8 P3_8 P3_8/ P5_7/ P4_14 P3_8/ P5_7/ P4_14 CSIH2CSS7 O CSIH2 serial peripheral chip select signal 7 P3_9/ P4_4 P3_9/ P4_4 P3_9/ P5_8/ P4_4 P3_9/ P5_8/ P4_4 CSIH2SSI I CSIH2 serial SS function control input signal — — P4_13/ P5_11 P4_13/ P5_11 CSIH2RYI I CSIH2 ready (1) / busy (0) input signal P3_7/ P2_3/ P4_3 P3_7/ P2_3/ P4_3 P3_7/ P2_3/ P4_3/ P5_12 P3_7/ P2_3/ P4_3/ P5_12 CSIH2RYO O CSIH2 ready (1) / busy (0) output signal P2_4 P2_4 P2_4/ P4_7/ P5_13 P2_4/ P4_7/ P5_13 CSIH2SCI I CSIH2 serial clock input signal P2_2/ P1_4/ P4_6 P2_2/ P1_4/ P4_6 P2_2/ P1_4/ P4_6/ P5_15 P2_2/ P1_4/ P4_6/ P5_15 CSIH2SCO O CSIH2 serial clock output signal P2_2/ P1_4/ P4_6 P2_2/ P1_4/ P4_6 P2_2/ P1_4/ P4_6/ P5_15 P2_2/ P1_4/ P4_6/ P5_15 CSIH2SI I CSIH2 serial data input P2_0/ P1_2/ P4_4/ P5_9 P2_0/ P1_2/ P4_4/ P5_9 P2_0/ P1_2/ P4_4/ P5_9 P2_0/ P1_2/ P4_4/ P5_9 CSIH2SO O CSIH2 serial data output P2_1/ P1_3/ P4_5/ P5_14 P2_1/ P1_3/ P4_5/ P5_14 P2_1/ P1_3/ P4_5/ P5_14 P2_1/ P1_3/ P4_5/ P5_14 CSIH3 CSIH3CSS0 O CSIH3 serial peripheral chip select signal 0 P2_8 P2_8 P2_8 P2_8 CSIH3CSS1 O CSIH3 serial peripheral chip select signal 1 P2_9 P2_9 P2_9 P2_9 CSIH3CSS2 O CSIH3 serial peripheral chip select signal 2 P3_5 P3_5 P3_5 P3_5 CSIH3CSS3 O CSIH3 serial peripheral chip select signal 3 P3_4 P3_4 P3_4 P3_4 CSIH3CSS4 O CSIH3 serial peripheral chip select signal 4 P3_3 P3_3 P3_3 P3_3 CSIH3CSS5 O CSIH3 serial peripheral chip select signal 5 P3_9 P3_9 P3_9 P3_9 Table 2.2 Pin Function (9/16) Category Pin name IO Function Alternative Port 100-pin 144-pin eVR DPS eVR DPS |
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