 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
RX72T Datasheet(PDF) 69 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
RX72T Datasheet(HTML) 69 Page - Renesas Technology Corp |
|
|
69 / 120 page  R01DS0331EJ0110 Rev.1.10 Page 69 of 120 Oct 06, 2023 RX72T Group 2. Electrical Characteristics 2.4.4 Control Signal Timing Note 1. tPBcyc: PCLKB cycle Figure 2.14 NMI Interrupt Input Timing Figure 2.15 IRQ Interrupt Input Timing Table 2.25 Control Signal Timing Conditions: VCC = 2.7 to 5.5 V, VCC_USB = 2.7 to 5.5 V, AVCC0 = AVCC1 = AVCC2 = 3.0 to 5.5V, VSS = VSS_USB = AVSS0 = AVSS1 = AVSS2 = 0 V, Ta = Topr Item Symbol Min.*1 Typ. Max. Unit Test Conditions*1 NMI pulse width tNMIW 200 — — ns 2 × tPBcyc ≤ 200 ns, Figure 2.14 2 × tPBcyc —— 2 × tPBcyc > 200 ns, Figure 2.14 IRQ pulse width tIRQW 200 — — 2 × tPBcyc ≤ 200 ns, Figure 2.15 2 × tPBcyc —— 2 × tPBcyc > 200 ns, Figure 2.15 NMI tNMIW tNMIW IRQn tIRQW tIRQW |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
