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ADS5547 Datasheet(PDF) 39 Page - Texas Instruments |
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ADS5547 Datasheet(HTML) 39 Page - Texas Instruments |
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39 / 54 page ![]() www.ti.com DDR LVDS Outputs CLKOUTP LOW_D0_P D1_D2_P D3_D4_P D5_D6_P D7_D8_P D9_D10_P OVR Pins OutputClock DataBitsLow,D0 DataBitsD1,D2 DataBitsD3,D4 DataBitsD5,D6 DataBitsD7,D8 DataBitsD9,D10 Out-of-RangeIndicator CLKOUTM LOW_D0_M D1_D2_M D3_D4_M D5_D6_M D7_D8_M D9_D10_M ADS5517 SLWS203 – DECEMBER 2007 In this mode, the 11 data bits and the output clock are available as LVDS (Low Voltage Differential Signal) levels. Two successive data bits are multiplexed and output on each LVDS differential pair as shown in Figure 42. So, there are 6 LVDS output pairs for the 11 data bits and 1 LVDS output pair for the output clock. Figure 42. DDR LVDS Outputs Even data bits D0, D2, D4, D6, D8, and D10 are output at the rising edge of CLKOUTP and the odd data bits D1, D3, D5, D7, and D9 are output at the falling edge of CLKOUTP. Both the rising and falling edges of CLKOUTP must be used to capture all the 11 data bits (see Figure 43). Copyright © 2007, Texas Instruments Incorporated Submit Documentation Feedback 39 Product Folder Link(s): ADS5517 |
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