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dc1851af

DEMO MANUAL DC1851A

QUICK START PROCEDURE

Jumpers

Jumper blocks are included to set the state of each control

pin to VL or GND. If the shorting jumper is set in the EXT

position, the control pin is connected to its associated tur-

ret and external signaling may be applied. Failure to select

one of the three positions results in a floating control pin

whose state is indeterminant. The turret is disconnected

and there are no internal or on-board pull-ups to establish

the logic state if the jumper block is open.

As shipped, jumpers on DC1851A are set to select

full-duplex RS485 mode with terminations enabled for

Channel 1, and RS232 mode for Channel 2.

See the data sheet Pin Functions and Function Tables for

a complete description of the control pin functions and

truth tables. A brief summary is given here:

Shared Control

JP5, LB: Loopback Enable. A logic high loops driver input

signals immediately back to associated receiver outputs.

Loopback is interrupted when a receiver is disabled. Default

position low, loopback disabled. Controls both channels

simultaneously.

JP6, H/F: RS485 Half-Duplex Select Input. A logic low

selects full-duplex operation where the RS485 receiver

responds to signals on the A and B pins. A logic high selects

half-duplex operation where the RS485 receiver responds

to singals on the Y and Z pins. Default position low, full

duplex enabled. Controls both channels simultaneously.

H/F has no effect on a channel in RS232 mode. Note that

it is also possible to operate in half duplex by selecting

full-duplex mode and simply connecting A to Y and B to Z.

JP7, FEN: Fast Enable. A logic high enables fast enable

mode; the internal supply generator remains operational

regardless of the state of the driver, receiver and termina-

tion enables. Default position high, fast enable enabled.

In this state, the internal supply generator remains opera-

tional in the event all drivers, receivers and terminations

are disabled. If shut down, the supply generator requires

about 200μs to power up again.

Independent Control

JP1, JP11, RXEN: Receiver Enable. A logic low enables

the receivers. Default position low, receivers enabled.

JP2, JP10, DXEN: Driver Enable. A logic high enables the

drivers. Default position high, drivers enabled.

JP3, JP9, TE485: RS485 Termination Enable. A logic high

enables 120Ω terminations across A-B and Y-Z. Default

JP3 position high, RS485 terminations enabled. Note

that in RS232 mode, TE485 is overridden and the RS485

termination for that channel is automatically disabled.

Default JP9 position low.

JP4, JP8, 485/232: RS485/RS232 Mode Select. A logic

high enables the RS485 mode. Default Channel 1 RS485,

Channel 2 RS232.

Probe Pads

Probe pads are included on the bottom of the board for

examination of the VCC, VDD, VEE, SW and CAP pins. A

GND probe pad is located nearby.

J5, J6

Terminal blocks J5 and J6 are included for easy connec-

tion of RS485 cables. For half-duplex operation, only Y

and Z need be connected. Terminal block connections are

hardwired to turrets A, B, Y and Z.

How to Operate DC1851A

Operation is straightforward: as shown in Figure 1, con-

nect a VCC supply of 3V to 5.5V, and a VL supply of 1.7V

up to VCC. There are no special supply sequencing restric-

tions, although if VL > VCC the logic I/O signaling may not

operate properly. Note that D1, the VL supply indicating

LED, will extinguish at VL < 2V. Apply logic and interface

signals to the desired inputs. Inputs may be driven with

the supplies removed, without damage to the LTC2872.