ADF4159

Data Sheet

Rev. E | Page 16 of 36

LSB FRAC REGISTER (R1) MAP

When Bits DB[2:0] are set to 001, the on-chip LSB FRAC

register (Register R1) is programmed (see Figure 26).

Reserved Bits

All reserved bits must be set to 0 for normal operation.

Phase Adjustment

Bit DB28 enables and disables phase adjustment. The phase

shift is generated by the value programmed in Bits DB[14:3].

13-Bit LSB Fractional Value (FRAC)

Bits DB[27:15], along with Bits DB[14:3] in the FRAC/INT

register (Register R0), set the FRAC value that is loaded into

the fractional interpolator. The FRAC value forms part of the

overall feedback division factor.

These 13 bits are the least significant bits (LSBs) of the 25-bit

FRAC value; Bits DB[14:3] in the FRAC/INT register are the

most significant bits (MSBs). For more information, see the

RF Synthesizer Worked Example section.

12-Bit Phase Value

Bits DB[14:3] control the phase word. The phase word is used

to increase the RF output phase relative to the current phase.

The phase change occurs after a write to Register R0.

Phase Shift = (Phase Value × 360°)/212

For example, Phase Value = 512 increases the phase by 45°.

To use phase adjustment, Bit DB28 must be set to 1. If phase

adjustment is not used, it is recommended that the phase value

be set to 0.

DB31

CONTROL

BITS

12-BIT PHASE VALUE

13-BIT LSB FRACTIONAL VALUE

(FRAC)

RESERVED

DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9

DB8

DB7

DB6

DB5

DB4

DB3

DB2

DB1

DB0

0

0

0

P1

F13

F12

F11

F10

F9

F8

F7

F6

F5

F4

F3

F2

F1

P12

P11

P10

P9

P8

P7

P6

P5

P4

P3

P2

P1

C3(0) C2(0) C1(1)

P12

P11

...

P2

P1

PHASE VALUE

0

1

...

1

1

2047

.

.

...

.

.

.

0

0

...

1

1

3

0

0

...

1

0

2

0

0

...

0

1

1

0

0

...

0

0

0 (RECOMMENDED)

1

1

...

1

1

–1

1

1

...

1

0

–2

1

1

...

0

1

–3

.

.

...

.

.

.

1

0

...

0

0

–2048

*THE FRAC VALUE IS MADE UP OF THE 12-BIT MSB STORED IN

REGISTER R0 AND THE 13-BIT LSB STORED IN REGISTER R1.

FRAC VALUE = 13-BIT LSB + 12-BIT MSB × 213.

DBB

DBB

NOTES

1. DBB = DOUBLE-BUFFERED BITS.

P1

PHASE ADJ

0

DISABLED

1

ENABLED

F13

F12

...

F2

F1

LSB FRACTIONAL VALUE

(FRAC)*

0

1

2

3

.

.

.

8188

8189

8190

8191

0

0

0

0

.

.

.

1

1

1

1

0

0

0

0

.

.

.

1

1

1

1

...

...

...

...

...

...

...

...

...

...

...

0

0

1

1

.

.

.

0

0

1

1

0

1

0

1

.

.

.

0

1

0

1

Figure 26. LSB FRAC Register (R1) Map