ADATE320KCPZ datasheet(58/78 Pages) AD

58 / 78 page

Data Sheet

ADATE320

THEORY OF OPERATION

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Rev. C | 58 of 78

Figure 130. DAC X2 Registers and Calibration Diagram

ALARM FUNCTIONS

The ADATE320 contains per channel overvoltage detectors (OVDL/

OVDH), per channel PPMU voltage/current clamps (PCLx/PCHx),

and a thermal alarm to detect and signal these respective fault

conditions. Any of these functions may flag an alarm independently

in the alarm state register (see Figure 152). The status of the

alarms may be determined at any time by reading the SPI alarm

state register. This register is read only, and its contents are cleared

by the read operation. The alarm flag bits can then become set by

any of the respective alarm functions. The individual fault condition

flags are logically OR'ed together to drive the open-drain ALARM

output pin to indicate that a fault condition has occurred (see Figure

134).

The various alarm flags can be either enabled or disabled (masked)

using the alarm mask register (see Figure 151). The thermal alarm

is enabled by default (mask bit clear), and the overvoltage and

PPMU clamp alarms are all disabled by default (mask bits set).

The PPMU clamp alarm behavior depends on the mode of the

PPMU. When in FI mode, the PPMU clamps behave as program-

mable voltage clamps. The high and low voltage clamp levels are

set by the respective PCHx and PCLx level setting DACs. If the

voltage on the DUTx pin reaches either the PCHx or PCLx setting,

a PPMU clamp alarm is generated, but only if the clamps are ena-

bled with the PPMU_CLAMP_ENABLE_x control bit in the PPMU

control register (see Figure 150). Note that if the PPMU clamps are

enabled and a PPMU clamp alarm is generated, the alarm can still

be masked with the alarm mask register. However, if the voltage

clamps are disabled, no PPMU clamp alarm is generated.

When the PPMU is in FV mode, the PPMU clamps behave as

programmable current clamps. The source and sink current clamp

levels are set with the respective PCHx and PCLx level setting

DACs. The current clamps cannot be disabled by setting or clearing

the PPMU_CLAMP_ENABLE_x control bit—the clamps are always

active when in PPMU FV mode. If the PCHx and PCLx levels are

set outside their functional range, a ±140% static current limit is

left in effect. If the current on a DUTx pin reaches either the PCHx

or PCLx clamp setting, or, alternatively, one of the static current

limits, a PPMU clamp alarm results. The PPMU clamp alarm can be

masked separately in the alarm mask register.

Refer to Figure 131 through Figure 134 for more information about

PPMU clamp functions.

The only purpose of the various alarm circuits is to detect and

indicate the presence of a fault condition of interest to the user.

The only action the ADATE320 takes upon detection of a fault is to

set the appropriate alarm state register flag bits in the alarm state

action is taken.

ADATE320KCPZ Datasheet(PDF) 58 Page - Analog Devices

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