ST18952 datasheet(46/67 Pages) STMICROELECTRONICS

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ST18952

JTAG IEEE 1149.1 test access port

The Test Access Port (TAP) conforms to IEEE standard 1149.1.

The TAP consists of five pins: TMS, TCK, TDI, TDO and TRST. TDO can be overdriven to the

power rails, and TCK can be stopped in either logic state.

The instruction register is 8 bits long, with no parity, and the pattern “00000001” is loaded into

the register during the

Capture-IR state.

There are three defined public instructions, see Table 13.1. All other instruction codes are

reserved.

Table 13.1

Instruction codes

Notes 1:

MSB... LSB; LSB closest to TDO

Emulation Unit

The emulation unit (EMU) performs to emulation and test fuctions through the external IEEE

1149.1 JTAG interface. Refer to ”JTAG IEEE 1149.1 test access port” on page 46.

The emulation and test operations are controlled by the JTAG Test Access Port (TAP) and the

emulator by means of dedicated control I/Os.

Emulation mode can entered in one of two ways:

• Asserting ERQ input pin low.

• Meeting a valid breakpoint condition or executing an instruction in single step

mode.

The PC board emulator is able to display the processor status (memories and registers) and

restore the context.

The Emulation resources (see Figure 14.1) include:

• Four breakpoint registers (BP0, BP1, BP2, BP3) which can be affected by

Program or Data memory.

• Breakpoint counter (BPC).

• Program Counter Trace Buffer (PCB) able to store the address of the 6 last

executed instructions.

• Three control registers for Breakpoint condition programming.

Instruction code

Instruction

Selected register

04h

IDCODE

Identification

08h

EMU

D950 IOscan

FFh

BYPASS

Bypass

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