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STA001

ELECTRICAL CHARACTERISTCS (continued)

Symbol

Parameter

Test Condition

Min.

Typ.

Max.

Unit

CRYSTAL OSCILLATOR (T = 25°, VDD-VSS = 3V)

XTAL1, XTAL2 common

mode DC voltage

XOSEL high

1.1

0.68

V

PLLs, SYNTHESIZERS (T = 25°, VDD-VSS = 3V)

RF pll loop settling time

within 1 KHz final freq. Offset, by using the

loop filter of Application board

1ms

Total phase noise

contribution

100Hz <

∆f < 1.84Mhz,

1.6

RF pll comparation

frequency

3.68

MHz

IF pll comparation

frequency

113.23

KHz

Spurious power level***

RF pll,

IF pll,

-100

-50

-45

dBc

dBc

RF PLL selectable

division ratios

from REF1 to LO1, range covered by a 0.5

step, using a 14.72MHz quartz

1443

(first

used

1454.5)

1506.5

(last

used

1495)

RF PLL selectable

division ratios

from REF1 to LO1, range covered by a 0.5

step, using a 14.725MHz quartz

1443

(first

used

1454)

1506.5

(last

used

1494.5)

IF PLL fixed division ratios from REF2 to LO2, 1 fixed +2 testing values

987

1034

1081

REF1 division ratio

from Crystal oscillator to REF1

4

REF2 division ratio

from Crystal oscillator to REF2

130

*** Using loop filter as suggested in application board schematics

RF VCO (T = 25°, VDD-VSS = 3V)

LO Freq. range

Using 14.72Mhz quartz

1338.14

1375.4

MHz

LO Freq. range

Using 14.725Mhz quartz

1338.134375 to 1375.407031

MHz

Freq. control voltage

range

Pin FLT1

0.2

0.2

V

TK1, NTK1 DC voltage

ENRFOSC high

1.3

1.1

0.65

V

Input impedance R || C

Balanced, TK1, NTK1 pins

300

0.2

Ω

pF