TMS320DM335 datasheet(58/156 Pages) TI

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TMS320DM335

Digital Media System-on-Chip (DMSoC)

SPRS528 – JULY 2008

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peripheral in the TMS320DM335 Digital Media System-on-Chip (DMSoC). The GPIO

peripheral provides dedicated general-purpose pins that can be configured as either inputs

or outputs. When configured as an input, you can detect the state of the input by reading the

state of an internal register. When configured as an output, you can write to an internal

SPRUFY6

TMS320DM335 Digital Media System-on-Chip (DMSoC) Pulse-Width Modulator (PWM)

Reference Guide This document describes the pulse-width modulator (PWM) peripheral in

the TMS320DM335 Digital Media System-on-Chip (DMSoC).

SPRUFZ2

TMS320DM335

Digital

Media

System-on-Chip

(DMSoC)

DDR2/Mobile

DDR

(DDR2/mDDR) Memory Controller Reference Guide This document describes the

DDR2/mDDR memory controller in the TMS320DM335 Digital Media System-on-Chip

(DMSoC). The DDR2/mDDR memory controller is used to interface with JESD79D-2A

standard compliant DDR2 SDRAM and mobile DDR devices.

SPRUFX8

TMS320DM335 Digital Media System-on-Chip (DMSoC) Video Processing Front End

(VPFE) Reference Guide This document describes the Video Processing Front End (VPFE)

in the TMS320DM335 Digital Media System-on-Chip (DMSoC).

SPRUFX9

TMS320DM335 Digital Media System-on-Chip (DMSoC) Video Processing Back End

(VPBE) Reference Guide This document describes the Video Processing Back End (VPBE)

in the TMS320DM335 Digital Media System-on-Chip (DMSoC).

SPRUFY7

TMS320DM335 Digital Media System-on-Chip (DMSoC) Real-Time Out (RTO) Controller

Reference Guide This document describes the Real Time Out (RTO) controller in the

TMS320DM335 Digital Media System-on-Chip (DMSoC).

SPRAAL2

Implementing DDR2/mDDR PCB Layout on the TMS320DM335 DMSoC This provides

board design recommendations and guidelines for DDR2 and mobile DDR.

Device Overview

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TMS320DM335 Datasheet(PDF) 58 Page - Texas Instruments