Electronic Components Datasheet Search
  English  ▼

X  

TMS320DM335 Datasheet(PDF) 154 Page - Texas Instruments

Click here to check the latest version.
Part # TMS320DM335
Description  Digital Media System-on-Chip (DMSoC)
PDF  156 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS320DM335 Datasheet(HTML) 154 Page - Texas Instruments

Back Button TMS320DM335 Datasheet HTML 148Page - Texas Instruments TMS320DM335 Datasheet HTML 149Page - Texas Instruments TMS320DM335 Datasheet HTML 150Page - Texas Instruments TMS320DM335 Datasheet HTML 151Page - Texas Instruments TMS320DM335 Datasheet HTML 152Page - Texas Instruments TMS320DM335 Datasheet HTML 153Page - Texas Instruments TMS320DM335 Datasheet HTML 154Page - Texas Instruments TMS320DM335 Datasheet HTML 155Page - Texas Instruments TMS320DM335 Datasheet HTML 156Page - Texas Instruments  
Zoom Inzoom in Zoom Outzoom out
 154 / 156 page
background image
6
Mechanical Data
6.1 Thermal Data for ZCE
6.1.1 Packaging Information
TMS320DM335
Digital Media System-on-Chip (DMSoC)
SPRS528 – JULY 2008
www.ti.com
The following table(s) show the thermal resistance characteristics for the PBGA – ZCE mechanical
package.
Note
that
micro-vias
are
not
required.
Contact
your
TI
representative
for
routing
recommendations.
The following table shows the thermal resistance characteristics for the PBGA – ZCE mechanical
package.
Table 6-1. Thermal Resistance Characteristics (PBGA Package) [ZCE]
NO.
°C/W(1)
1
R
ΘJC
Junction-to-case
7.2
2
R
ΘJB
Junction-to-board
11.4
3
R
ΘJA
Junction-to-free air
27.0
4
PsiJT
Junction-to-package top
0.1
5
PsiJB
Junction-to-board
11.3
(1)
The junction-to-case measurement was conducted in a JEDEC defined 2S2P system and will change based on environment as well as
application. For more information, see these three EIA/JEDEC standards:
•
EIA/JESD51-2, Integrated Circuits Thermal Test Method Environment Conditions - Natural Convection (Still Air)
•
EIA/JESD51-3, Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages
•
JESD51-7, High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages
The following packaging information and addendum reflect the most current data available for the
designated device(s). This data is subject to change without notice and without revision of this document.
Note that micro-vias are not required for this package.
154
Mechanical Data
Submit Documentation Feedback



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com