OMAP3530 datasheet(8/264 Pages) TI

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Contents

OMAP3530/25 Applications Processor

SPRS507B – FEBRUARY 2008 – REVISED JULY 2008

www.ti.com

OMAP3530/25 Applications Processor

.............. 1

4.3

DPLL and DLL Specifications

...................... 142

1.1

Features

.............................................. 1

VIDEO DAC SPECIFICATIONS

..................... 149

1.2

Description

............................................ 4

5.1

Interface Description

............................... 149

5.2

Electrical Specifications Over Recommended

1.3

Functional Block Diagram

............................ 6

Operating Conditions

.............................. 151

Revision History

............................................... 9

5.3

Analog Supply (vdda_dac) Noise Requirements

.. 153

TERMINAL DESCRIPTION

............................ 10

5.4

External Component Value Choice

................ 154

2.1

Terminal Assignment

................................ 10

TIMING REQUIREMENTS AND SWITCHING

2.2

Ball Characteristics

.................................. 15

CHARACTERISTICS

.................................. 155

2.3

Multiplexing Characteristics

......................... 68

6.1

Timing Test Conditions

............................ 155

2.4

Signal Description

................................... 91

6.2

Interface Clock Specifications

..................... 155

ELECTRICAL CHARACTERISTICS

................ 119

6.3

Timing Parameters

................................. 156

3.1

Power Domains

.................................... 119

6.4

External Memory Interfaces

........................ 157

3.2

Absolute Maximum Ratings

........................ 121

6.5

Video Interfaces

.................................... 186

3.3

Recommended Operating Conditions

............. 124

6.6

Serial Communications Interfaces

................. 203

3.4

DC Electrical Characteristics

....................... 126

6.7

Removable Media Interfaces

...................... 236

3.5

Core Voltage Decoupling

.......................... 129

6.8

Test Interfaces

..................................... 251

3.6

Power-up and Power-down

........................ 131

PACKAGE CHARACTERISTICS

.................... 257

CLOCK SPECIFICATIONS

........................... 134

7.1

Package Thermal Resistance

...................... 257

4.1

Input Clock Specifications

......................... 135

7.2

Device Support

..................................... 257

4.2

Output Clock Specifications

........................ 140

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