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OMAP3530 Datasheet(PDF) 28 Page - Texas Instruments

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Part # OMAP3530
Description  Applications Processor
PDF  264 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

OMAP3530 Datasheet(HTML) 28 Page - Texas Instruments

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OMAP3530/25 Applications Processor
SPRS507B – FEBRUARY 2008 – REVISED JULY 2008
www.ti.com
Table 2-1. Ball Characteristics (CBB Pkg.) (continued)
BALL
BALL
PIN
MODE [4]
TYPE [5]
BALL
BALL
RESET
POWER [9]
HYS
BUFFER
PULL
IO
BOTTOM [1]
TOP [2]
NAME [3]
RESET
RESET
REL.
[10]
STRENGTH
U/D
CELL [13]
STATE [6]
REL.
MODE [8]
(mA) [11]
TYPE
STATE [7]
[12]
safe_mode
7
AD26
NA
i2c4_scl
0
IOD
H
H
0
VDDS
Yes
4
PU/ PD
Open Drain
sys_ nvmode1
1
O
safe_mode
7
AE26
NA
i2c4_sda
0
IOD
H
H
0
VDDS
Yes
4
PU/ PD
Open Drain
sys_ nvmode2
1
O
safe_mode
7
J25
NA
hdq_sio
0
IOD
H
H
7
VDDS
Yes
4
PU/ PD
LVCMOS
sys_altclk
1
I
i2c2_sccbe
2
O
i2c3_sccbe
3
O
gpio_170
4
IO
safe_mode
7
AB3
NA
mcspi1_clk
0
IO
PGM
L
7
VDDS
Yes
4
(2)
PU/ PD
LVCMOS
mmc2_dat4
1
IO
gpio_171
4
IO
safe_mode
7
AB4
NA
mcspi1_ simo
0
IO
PGM
L
7
VDDS
Yes
4
(2)
PU/ PD
LVCMOS
mmc2_dat5
1
IO
gpio_172
4
IO
safe_mode
7
AA4
NA
mcspi1_ somi
0
IO
PGM
L
7
VDDS
Yes
4
(2)
PU/ PD
LVCMOS
mmc2_dat6
1
IO
gpio_173
4
IO
safe_mode
7
AC2
NA
mcspi1_cs0
0
IO
PGM
H
7
VDDS
Yes
4
(2)
PU/ PD
LVCMOS
mmc2_dat7
1
IO
gpio_174
4
IO
safe_mode
7
AC3
NA
mcspi1_cs1
0
O
PGM
H
7
VDDS
Yes
4
(2)
PU/ PD
LVCMOS
mmc3_cmd
3
IO
gpio_175
4
IO
safe_mode
7
AB1
NA
mcspi1_cs2
0
O
PGM
H
7
VDDS
Yes
4
(2)
PU/ PD
LVCMOS
mmc3_clk
3
O
gpio_176
4
IO
safe_mode
7
AB2
NA
mcspi1_cs3
0
O
H
H
7
VDDS
Yes
4
PU/ PD
LVCMOS
hsusb2_tll_ data2
2
IO
hsusb2_ data2
3
IO
gpio_177
4
IO
mm2_txdat
5
IO
safe_mode
7
AA3
NA
mcspi2_clk
0
IO
L
L
7
VDDS
Yes
4
PU/ PD
LVCMOS
hsusb2_tll_ data7
2
IO
hsusb2_ data7
3
O
gpio_178
4
IO
safe_mode
7
Y2
NA
mcspi2_ simo
0
IO
L
L
7
VDDS
Yes
4
PU/ PD
LVCMOS
gpt9_pwm_evt
1
IO
hsusb2_tll_ data4
2
IO
hsusb2_ data4
3
I
gpio_179
4
IO
safe_mode
7
TERMINAL DESCRIPTION
28
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