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HT80C51 Datasheet(PDF) 11 Page - List of Unclassifed Manufacturers

Part # HT80C51
Description  User Manual Document Information
PDF  132 Pages
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HT80C51 User Manual
Memory Organization – Internal Data Memory: Direct and Indirect Address Area
Handshake Solutions
© Philips Electronics N.V. 2005
Page 11 of 132
2.4.
Internal Data Memory: Direct and Indirect Address Area
The lower 128 bytes of RAM can be accessed by both direct and indirect addressing and they can be
divided into three segments as listed below and shown in [Figure 5].
register bank 0
register bank 1
register bank 2
register bank 3
bit addresses
00 … 7F
scratch
pad
area
bit
addressable
segment
register
banks
7FH
30H
2FH
20H
1FH
18H
17H
10H
0FH
08H
07H
00H
[Figure 5]
Lower 128 bytes of RAM, direct and indirect addressing
1. Register Banks 0-3:
Locations 00H through 1FH (32 bytes). The device after reset defaults to register bank 0. To use the
other register banks, the user must select them in software. Each register bank contains eight 1-byte
registers 0 through 7. Reset initializes the stack pointer to location 07H, and it is incremented once to
start from location 08H, which is the first register (R0) of the second register bank. Thus, in order to
use more than one register bank, the SP should be initialized to a different location of the RAM where it
is not used for data storage (i.e., the higher part of the RAM).
The register bank is selected by bits RS0 and RS1 in the program status word.
2. Bit Addressable Area:
16 bytes have been assigned for this segment, 20H-2FH. Each one of the 128 bits of this segment
can be directly addressed (0-7FH). The bits can be referred to in two ways, both of which are accept-



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