HT80C51 datasheet(94/132 Pages) ETC2

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Handshake Solutions

HT80C51 User Manual

80C51 Family Instruction Set – Instruction definitions

Page 94 of 132

AJMP addr11

Function: Absolute Jump

Description: AJMP transfers program execution to the indicated address, which is formed at run-time by con-

catenating the high-order five bits of the PC ( after incrementing the PC twice), opcode bits 7-5,

and the second byte of the instruction. The destination must therefore be within the same 2k block

of program memory as the first byte of the instruction following AJMP.

Example: The label “JMPADR” is at program memory location 0123H. The instruction,

AJMP JMPADR

is at location 0345H and will load the PC with 0123H.

Bytes: 2

Cycles: 2

Encoding:

Operation: AJMP

(PC)

← (PC) + 2

(PC10-0)

← page address

ANL <dest-byte>,<src-byte>

Function: Logical-AND for byte variables

Description: ANL performs the bitwise logical-AND operation between the variables indicated and stores the

results in the destination variable. No flags are affected.

The two operands allow six addressing mode combinations. When the destination is the Accumu-

lator, the source can use register, direct, register-indirect, or immediate addressing; when the des-

tination is a direct address, the source can be the Accumulator or immediate data.

Note: When this instruction is used to modify an output port, the value used as the original port

data will be read from the output data latch, not the input pins.

Example: If the Accumulator holds 0C3H (11000011B) and register 0 holds 55H (01010101B) then the in-

struction,

ANL A,R0

will leave 41H (01000001B) in the Accumulator.

When the destination is a directly addressed byte, this instruction will clear combinations of bits in

any RAM location or hardware register. The mask byte determining the pattern of bits to be

cleared would either be a constant contained in the instruction or a value computed in the Accu-

mulator at run-time. The instruction,

ANL P1,#01110011B

will clear bits 7, 3, and 2 of output port 1.

a10

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