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Handshake Solutions
HT80C51 User Manual
80C51 Family Instruction Set – Instruction definitions
Page 100 of 132
© Philips Electronics N.V. 2005
CPL A
Function: Complement Accumulator
Description: Each bit of the Accumulator is logically complemented (one’s complement). Bits which previously
contained a one are changed to a zero and vice-versa. No flags are affected.
Example: The Accumulator contains 5CH (01011100B). The instruction,
CPL A
will leave the Accumulator set to 0A3H (10100011B).
Bytes: 1
Cycles: 1
Encoding:
Operation: CPL
(A)
← ¬ (A)
CPL bit
Function: Complement bit
Description: The bit variable specified is complemented. A bit which had been a one is changed to zero and
vice-versa. No other flags are affected. CPL can operate on the carry or any directly addressable
bit.
Note: When this instruction is used to modify an output pin, the value used as the original data will
be read from the output data latch, not the input pin.
Example: Port 1 has previously been written with 5DH (01011101B). The instruction sequence,
CPL P1.1
CPL P1.2
will leave the port set to 5BH (01011011B).
CPL C
Bytes: 1
Cycles: 1
Encoding:
Operation: CPL
(C)
←¬ (C)
CPL bit
Bytes: 2
Cycles: 1
Encoding:
Operation: CPL
(bit)
← ¬ (bit)
1
1
1
1
0
1
0
0
1
0
1
1
0
0
1
1
1
0
1
1
0
0
1
0
bit address
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