Handshake Solutions
HT80C51 User Manual
80C51 Family Instruction Set – Instruction definitions
Page 116 of 132
© Philips Electronics N.V. 2005
MOVC A,@A+DPTR
Bytes: 1
Cycles: 2
Encoding:
Operation: MOVC
(A)
← ((A) + (DPTR))
MOVC A,@A+PC
Bytes: 1
Cycles: 2
Encoding:
Operation: MOVC
(PC)
← (PC) + 1
(A)
← ((A) + (PC))
MOVX <dest-byte>,<src-byte>
Function: Move External
Description: The MOVX instructions transfer data between the Accumulator and a byte of external data mem-
ory, hence the “X” appended to MOV. There are two types of instructions, differing in whether they
provide an eight-bit or sixteen-bit indirect address to the external data RAM.
In the first type, the contents of R0 or R1 in the current register bank provide an eight-bit address.
Eight bits are sufficient for external I/O expansion decoding or for a relatively small RAM array.
For somewhat larger arrays, the SFR XRAMP be used to define higher-order address bits. These
pins would be set by a move instruction to XRAMP preceding the MOVX.
In the second type of MOVX instruction, The Data Pointer generates a sixteen-bit address. This
form is faster and more efficient when accessing very large data arrays (up to 64k bytes), since no
additional instructions are needed to set up the output ports.
It is possible in some situations to mix the two MOVX types. A large RAM array with its high-order
address lines can be addressed via the Data Pointer, or with code to output high-order address
bits to XRAMP followed by a MOVX instruction using R0 or R1.
Example: An external 256 byte RAM using multiplexed address/data lines is connected to the 8051. Regis-
ters 0 and 1 contain 12H and 34H. Location 34H of the external RAM holds the value 56H. The
instruction sequence,
MOVX A,@R1
MOVX @R0,A
copies the value 56H into both the Accumulator and external RAM location 12H.
MOVX A,@Ri
Bytes: 1
Cycles: 2
Encoding:
Operation: MOVX
(A)
← ((Ri))
1
0
0
1
0
0
1
1
1
0
0
0
0
0
1
1
1
1
1
0
0
0
1
i
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