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AMIS-30521 Datasheet(PDF) 6 Page - AMI SEMICONDUCTOR |
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AMIS-30521 Datasheet(HTML) 6 Page - AMI SEMICONDUCTOR |
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6 / 26 page ![]() AMIS-30521 Micro-stepping Motor Driver Data Sheet 6.4 AC Parameters The AC parameters are given for VBB and temperature in their operating ranges. Table 6: AC Parameters Symbol Pin(s) Parameter Remark/Test Conditions Min. Typ. Max. Unit Internal Oscillator fosc Frequency of internal oscillator 3.6 4 4.4 MHz Motordriver PWM frequency 20.8 22.8 24.8 kHz fPWM Double PWM frequency Frequency depends only on internal oscillator 41.6 45.6 49.6 kHz fj PWM Jitter frequency tbd Hz fd MOTxx PWM Jitter depth tbd % fPWM EMC[1:0] = 00 150 V/µs EMC[1:0] = 01 100 V/µs EMC[1:0] = 10 50 V/µs Tbrise MOTxx turn-on voltage slope, 10% to 90% EMC[1:0] = 11 25 V/µs EMC[1:0] = 00 150 V/µs EMC[1:0] = 01 100 V/µs EMC[1:0] = 10 50 V/µs Tbfall MOTxx turn-off voltage slope, 90% to 10% EMC[1:0] = 11 25 V/µs Digital Outputs TH2L DO ERRB Output fall-time from VinH to VinL Capacitive load 400pF and pull- up resistor of 1.5 k Ω 50 ns Charge Pump fCP CPN CPP Charge pump frequency 250 kHz TCPU MOTxx Start-up time of charge pump Spec external components CLR Function TCLR CLR Hard reset duration time 20 90 µs 6.5 SPI Timing Table 7: SPI Timing Parameters Symbol Parameter Min. Typ. Max. Unit tCLK SPI clock period 1 µs tCLK_HIGH SPI clock high time 100 ns tCLK_LOW SPI clock low time 100 ns tSET_DI DI set up time, valid data before rising edge of CLK 50 ns tHOLD_DI DI hold time, hold data after rising edge of CLK 50 ns tCSB_HIGH CSB high time 2.5 µs tSET_CSB CSB set up time, CSB low before rising edge of CLK 100 ns tSET_CLK CLK set up time, CLK low before rising edge of CSB 100 ns DI VALID CLK tSET_CSB PC20070608.1 CS tCLK tCLK_HI tCLK_LO tSET_DI tHOLD_DI tSET_CLK 0,2 VCC 0,8 VCC 0,2 VCC 0,2 VCC 0,2 VCC 0,8 VCC Figure 4: SPI Timing 6 AMI Semiconductor – June 2007, M-20683-001 www.amis.com |
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