33291L datasheet(15/26 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

33291L

FUNCTIONAL DESCRIPTION

POWER CONSUMPTION

The 33291L has extremely low power consumption in both

the operating and standby modes. In the standby, or Sleep,

mode, with VDD ≤ 2.0 V, the current consumed by the VPWR

pin is less than 25

μA. In the operating mode, the current

drawn by the VDD pin is less than 4.0 mA (1.0 mA typical)

while the current drawn at the VPWR pin is 2.0 mA maximum

(1.0 mA typical). During normal operation, turning outputs

ON increases IPWR by only 20 μA per output. Each output

experiencing a soft short (overcurrent conditions just under

the current limit) adds 0.5 mA to the IPWR current

PARALLELING OF OUTPUTS

Using MOSFETs as output switches permits connecting

any combination of outputs together. RDS(ON) of MOSFETs

have an inherent positive temperature coefficient providing

balanced current sharing between outputs without

destructive operation (bipolar outputs could not be paralleled

in this fashion as thermal run-away would likely occur). The

device can even be operated with all outputs tied together.

This mode of operation may be desirable in the event the

application requires lower power dissipation or the added

capability of switching higher currents.

Performance of parallel operation results in a

corresponding decrease in RDS(ON) while the Output OFF

Open Load Detect Currents and the Output Current Limits

increase correspondingly (by a factor of eight if all outputs are

paralleled). Less than 125 m

Ω RDS(ON) at 25°C with current

limiting of 8 A to 24 A will result if all outputs are paralleled

together. There will be no change in the overvoltage detect or

the OFF output threshold voltage range. The advantage of

paralleling outputs within the same 33291L affords the

existence of minimal RDS(ON) and output clamp voltage

variation between outputs.

Typically, the variation of RDS(ON) between outputs of the

same device is less than 0.5 percent. The variation in clamp

voltages, potentially affecting dynamic current sharing, is less

than five percent. Paralleling outputs from two or more

different devices is possible, but it is not recommended.

There is no guarantee the RDS(ON) and clamp voltage of the

two devices will match. System level thermal design analysis

and verification should be conducted whenever paralleling

outputs, particularly where different devices are involved.

33291L Datasheet(PDF) 15 Page - Freescale Semiconductor, Inc

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