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33291L Datasheet(PDF) 19 Page - Freescale Semiconductor, Inc |
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33291L Datasheet(HTML) 19 Page - Freescale Semiconductor, Inc |
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19 / 26 page ![]() Analog Integrated Circuit Device Data Freescale Semiconductor 19 33291L FUNCTIONAL DESCRIPTION Grounding the SFPD pin will enable the short fault protection shutdown circuitry. Consider a load short (output short to supply) occurring on an output before, during, and after output turn ON. When the CS signal rises to the high logic state, the corresponding output is turned ON and a delay timer is activated. The duration of the delay timer is 70 μs to 250 μs. If the short circuit takes place before the output is turned ON, the delay experienced is the entire 70 μs to 250 μs followed by shutdown. If the short occurs during the delay time, the shutdown still occurs after the delay time has elapsed. However, if the short circuit occurs after the delay time, shutdown is immediate (within 20 μs after sensing). The purpose of the delay timer is to prevent false faults from being reported when switching capacitive loads. If the SFPD pin is at 5.0 V (or VDD), an output will not be disabled when an overcurrent is detected. The specific output will, within 5.0 μs to 10 μs of encountering the short circuit, go into an analog current limited mode. This feature is especially useful when switching incandescent lamp loads, where high in-rush currents experienced during startup last for 10 ms to 20 ms. Each output of the 33291L has its own overcurrent shutdown circuitry. Overtemperature faults and overvoltage faults are not affected by the SFPD pin’s state. Both load current sensing and output voltage sensing are incorporated for Short Fault detection with actual detection occurring slightly after the onset of current limit. The current limit circuitry incorporates a SENSEFET approach to measure the total drain current. This calls for the current through a small number of cells in the power MOSFET to be measured and the result multiplied by a constant, giving the total current. Whereas an output shutdown circuitry measures the drain-to-source voltage, shutting down the output if its threshold (VTHRES) will be exceeded. Short fault detection is accomplished by sensing the output voltage and comparing it to VThres. The lowest VThres requires a voltage of 2.5 V to be sensed. For an enabled output, with VDD = 5.0 ± 0.5 V, an output voltage in excess of 3.5 V will be detected as a short (overcurrent condition), while voltages less than 2.5 V will not be detected as shorts. OVERCURRENT RECOVERY If the SFPD pin is in a high logic state, the circuit returns to normal operation automatically after the short circuit is removed (unless thermal shutdown has occurred). If the SFPD pin is grounded and overcurrent shutdown occurs, removing the short circuit will result in the output remaining OFF until the next write cycle. If the short circuit is not removed, the output will turn ON for the delay time (70 μs to 250 μs) and then turn OFF for every write cycle commanding a turn ON. SFPD PIN VOLTAGE SELECTION Since the voltage condition of the SFPD pin controls the activation of the short fault protection (i.e., shutdown) mode equally for all eight outputs, the load having the longest duration of in-rush current determines what voltage (state) the SFPD pin should be. Usually if at least one load is, say an incandescent lamp, the in-rush current on that input will be milliseconds in duration. Therefore, setting SFPD at 5.0 V will prevent shutdown of the output due to the in-rush current. The system relies only on the overtemperature shutdown to protect the outputs and the loads. The 33291L was designed to switch GE194 incandescent lamps (or equivalents) with the SFPD pin in a grounded state. Considerably larger lamps can be switched with the SFPD pin held in a high logic state. Sometimes both a delay period greater than 70 μs to 250 μs (current limiting of the output) followed by an immediate overcurrent shutdown is necessary. This can be accomplished by programming the SFPD pin to 5.0 V for the extended delay period, allowing the outputs to remain ON in a current limited mode, then grounding it to accomplish the immediate shutdown after a period of time. Additional external circuitry is required to implement this type of function. An MCU parallel output port can be devoted to controlling the SFPD voltage during and after the delay period; this is often a much better method. In either case, care should be taken to execute the SFPD start-up routine every time startup or reset occurs. UNDERVOLTAGE SHUTDOWN An undervoltage VDD condition will result in the global shutdown of all outputs. The undervoltage threshold is between 2.5 V and 3.5 V. When VDD goes below the threshold, all outputs are turned OFF and the Serial Output data register is reset to indicate the same. An undervoltage condition at the VPWR pin will not cause output shutdown and reset. When VPWR is between 5.5 V and 9.0 V, the outputs will operate per the command word. However, the status as reported by the SO pin may not be accurate below 9.0 V VPWR. Proper operation at VPWR voltages below 5.5 V are not be guaranteed. DECIPHERING FAULT TYPE The 33291L SO pin can be used to determine what kind of system fault has occurred. With eight outputs having open load, overcurrent, overtemperature, and overvoltage faults, a total of 25 different faults are possible. The SO status word received by the MCU will be compared with the word sent to the 33291L during the previous write cycle. For a specific output, if the SO bit compares with the corresponding SI bit of the previous word, the output is operating normal with no fault. Only when the SO bit and previous word SI bit differ is there a fault indicated. If the two words are not the same, the MCU should be programmed to determine which output or outputs are faulted. If for a specific output the initial SI command bit were logic high, the output would be programmed to be off; if upon the next command word being entered, a logic low came back on SO, for that specific output’s corresponding bit an output-off open-load fault would be indicated. The resulting SO bit for that specific output would be different from that entered during the previous word for that SI bit, indicating the fault. |
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