38K2 datasheet(148/151 Pages) RENESAS

148 / 151 page

REVISION HISTORY

38K2 GROUP DATA SHEET

Rev.

Date

Description

Page

Summary

(1/3)

1.0

7/6/01

1.1

7/19/01

First edition issued

Fig.24: VREFCON.....1: Low current mode

P41/ExDACK/TxD pin

P42/ExTC/SCLK pin

Fig.102: INT_CTR.....0 0 1: RxB_RDY

Some Features are revised: Power source voltage, Power dissipation, Operating

temperature range.

Fig.1: The design of top view is revised.

Table 1: The Function of Vcc, VccE and USBVREF is revised.

100D0M package is added.

Table 2: The product M38K29RFS is added.

Fig. 7: The description of system clock division ratio selection bits is revised.

The explanations from pages 25 to 30 are added.

Fig. 29: In (6) Endpoint 11 Bit name of EP11REQ is revised.

Fig. 31: The Function is revised.

Fig. 70: The Function is revised.

The explanations from pages 57 to 60 are added.

Fig. 106: Bit name of EXBIREQ. is revised:

Fig. 108: Note is added.

Fig. 109: Bit attributes are revised.

Fig. 114: Register symbol is revised.

The explanations of A-D converter are revised.

The voltages regarding RESET is revised.

The clock frequency regarding PLL is revised.

Fig. 144 is added.

The explanations of FLASH MEMORY MODE and Table 9 are revised.

The explanations of Microcomputer Mode and Boot Mode, and Fig.145 are revised.

The explanations of Operation speed are revised.

The explanations of (2) Parallel I/O Mode are revised.

The explanations of (3) Standard Serial I/O Mode are revised.

Table 12: The Function of VccE, CNVss, P10 to P15, P16 and P17 is revised.

Fig. 153: The descriptions of CE and SCLK are added.

Fig. 165: P16 (CE) is added.

The explanations of Instruction Execution Time are revised.

The explanations of Definition of A-D Conversion Accuracy is added.

2.0

2/14/02

25–30

57–60

100

103

110

111

112

113

124

125

126

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