M34286 datasheet(22/66 Pages) RENESAS

22 / 66 page

Rev.1.00

Aug 06, 2008

page 22 of 64

REJ03B0251-0100

4286 Group

Fig. 27 Clock control circuit structure

System clock signal f(XIN) is obtained by externally connecting a

ceramic resonator. Connect this external circuit to pins XIN and

XOUT at the shortest distance as shown Figure 28.

A feedback resistor is built-in between XIN pin and XOUT pin.

Fig. 28 Ceramic resonator external circuit

CLOCK CONTROL

The clock control circuit consists of the following circuits.

• System clock generating circuit

• Control circuit to stop the clock oscillation

• Control circuit to return from the RAM back-up state

Use the resonator manufacturer’s

recommended value because

constants such as capacitance

depend on the resonator.

4286

XIN

XOUT

CIN

COUT

OSC

POF instruction

XIN

XOUT

Ports E0,E1,G0–G3

Pull-down control

Port E2

Frequency divider

(divided by 4)

Frequency

divider

(divided by 8)

CCK/CCK2/CCK4 instruction

STCK

INSTCK

Instruction clock

Internal power-on reset circuit

Ports D0–D7

Pull-down control

Multi-

plexer

CCK, CCK2, or CCk4 instruction can be executed only once.

After one of their instruction is executed once, the operation is same as the NOP instruction

though the same or another frequency dividing instruction is executed.

Frequency

divider

(divided by 4)

Frequency

divider

(divided by 2)

Frequency

divider

(through mode)

M34286 Datasheet(PDF) 22 Page - Renesas Technology Corp

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