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4524 Datasheet(PDF) 11 Page - Renesas Technology Corp |
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4524 Datasheet(HTML) 11 Page - Renesas Technology Corp |
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11 / 161 page ![]() Rev.2.00 Jul 27, 2004 page 11 of 159 REJ03B0091-0200Z 4524 Group Port block diagram (3) W11 W10 S RQ FR23 W60 0 1 D7/CNTR0 S RQ D8/INT0 S RQ D9/INT1 Register YDecoder SD instruction RD instruction Skip decision (SZD instruction) CLD instruction (Note 1) (Note 2) Clock (input) for timer 1 event count Underflow signal divided by 2 of timer 1 or timer 2 (Note 1) (Note 2) Register Y Decoder SD instruction RD instruction CLD instruction (Note 3) External 0 interrupt circuit External 0 interrupt Key-on wakeup Timer 1 count start synchronous circuit input (Note 1) (Note 2) Register YDecoder SD instruction RD instruction CLD instruction (Note 3) External 1 interrupt circuit External 1 interrupt Key-on wakeup Timer 3 count start synchronous circuit input This symbol represents a parasitic diode on the port. 2: Applied potential to these ports must be VDD or less. 3: As for details, refer to the description of external interrupt circuit. Notes 1: |
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