M32C83T datasheet(300/527 Pages) RENESAS

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Page 277

21. Intelligent I/O (Waveform Generation Function)

)

(

Figure 21.24 Single-Phase Waveform Output Mode

FFFF16

fBTi

65536-m

fBTi

65536

fBTi

Base Timer i

(1) Free-Running Operation

(The RST2 to RST0 bits in the GiBCR1 register are set to "0002")

(2) The Base Timer is Reset when the Base Timer Matches the GiPO0 Register

(The RST1 bit is set to "1", and the RST0 and RST2 bits are set to "0")

000016

OUTCij pin(1)

OUTCij pin(2)

POijR bit in the

IIOiIR register

POijR bit in the

IIOiIR register

i=0 to 3; j=0 to 7 (however, i=0 when j=0, 1, 4, 5)

m : Setting value of the GiPOj register (000016 to FFFF16)

POijR bit: Bits in the IIO0IR to IIO11IR register

OUTCij pin

n+2

Base Timer i

000016

fBTi

n+2-m

fBTi

n+2

fBTi

i=0 to 3; j=1 to 7 (however, i=0 when j=1, 4, 5)

m : Setting value of the GiPOj register (000016 to FFFF16)

n : Setting value of the GiPO0 register (000116 to FFFD16)

POijR bit: Bits in the IIO0IR to IIO11IR register

The above diagram applies under the following conditions:

• The IVL bit in the GiPOCRj register is set to "0" (outputs "L" as default value). The INV

bit is set to "0" (not inverse).

• The UD1 to UD0 bits in the GiBCR1 register are set to "002" (counter increment mode),

and the CAS bit to "0" (16-bit waveform generation function)

• m < n+2

NOTES:

1. Waveform output when the INV bit in the GiPOCRj register is set to "0" (not inversed)

and the IVL bit is set to "0" (output "L" as default value).

2. Waveform output when the INV bit is set to "0" (not inversed) and the IVL bit is set to "1"

(output "H" as default value).

Write "0" by

program if

setting to "0"

Write "0" by program

if setting to "0"

"H"

"L"

"0"

"1"

"H"

"L"

"0"

"1"

The above applies applies under the following conditions:

• The RST2 to RST0 bits in the GiBCR1 register are set to "0002" (no base timer reset),

the UD1 to UD0 bits to "002" (counter increment mode), and CAS bit to "0"

(16-bit waveform generation function)

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