M32C83T datasheet(305/527 Pages) RENESAS

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Page 282

21. Intelligent I/O (Waveform Generation Function)

)

(

FFFF16

n-m

fBTi

65536

fBTi

000016

p+2

000016

65536-n+m

fBTi

n-m

fBTi

p+2-n+m

fBTi

p+2

fBTi

(1) Free-Running Operation

(The RST2 to RST0 bits in the GiBCR1 register are set to "0002")

i=0, 3; j=0, 2, 4, 6 (however, i=0 when j=0, 4); k=j+1

m : Setting value of the GiPOj register (000016 to FFFF16)

n : Setting value of the GiPOk register (000016 to FFFF16)

POijR, POikR bits: Bits in the IIO0IR to IIO11IR registers

Write "0" by program

if setting to "0"

Write "0" by program

if setting to "0"

(2) The Base Timer is Reset when the Base Timer Matches the GiPO0 Register

(The RST1 bit is set to "1", and the RST0 and RST2 bits are set to "0")

i=0 to 3; j=2, 4, 6 (however, i=0 when j=4);

k=j+1

m : Setting value of the GiPOj register (000016 to FFFF16)

n: Setting value of the GiPOk register (000016 to FFFF16)

p: Setting value of the GiPO0 register (000116 to FFFD16)

POijR, POikR bits: Bits in the IIO0IR to IIO11IR registers

Write "0" by program

if setting to "0"

Write "0" by program

if setting to "0"

Base timer i

OUTCij pin

POijR bit

POikR bit

Base Timer i

OUTCij pin(1)

OUTCij pin(2)

POijR bit

POikR bit

The diagram above applies under the following conditions:

• The IVL bit in the GiPOCRk register is set to "0" (outputs "0" as default value). The INV bit is set

to "0" (not inversed).

• The UD1 to UD0 bits in the GiBCR1 register are set to "002" (counter increment mode) and

the CAS bit to "0" (16-bit waveform generation function).

• m < n < p+2

NOTES:

1. Waveform output when the INV bit in the GiPOCRj register is set to "0" (not inversed) and

the IVL bit is set to "0" (output "L" as default value).

2. Waveform output when the INV bit is set to "0" (not inversed) and the IVL bit is set to "1"

(output "H" as default value).

"H"

"L"

"0"

"1"

"0"

"1"

"H"

"L"

"0"

"1"

The diagram above applies under the following condition:

• The RST2 to RST0 bits in the GiBCR1 register are set to "0002" (no base timer reset),

the UD1 to UD0 bits to "002" (counter increment mode), and the CAS bit to "0"

(16-bit waveform generation function).

• m < n

Figure 21.26 SR Waveform Output Mode

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