HD64F36057 datasheet(13/592 Pages) RENESAS

13 / 592 page

Rev. 4.00 Mar. 15, 2006 Page xiii of xxxii

10.4.1

Interval Timer Operation .................................................................................. 147

10.4.2

Auto-Reload Timer Operation .......................................................................... 147

10.4.3

Event Counter Operation .................................................................................. 147

10.5

Timer B1 Operating Modes .............................................................................................. 148

Section 11 Timer V............................................................................................149

11.1

Features............................................................................................................................. 149

11.2

Input/Output Pins .............................................................................................................. 151

11.3

Register Descriptions ........................................................................................................ 151

11.3.1

Timer Counter V (TCNTV) .............................................................................. 151

11.3.2

Time Constant Registers A and B (TCORA, TCORB) .................................... 152

11.3.3

Timer Control Register V0 (TCRV0) ............................................................... 152

11.3.4

Timer Control/Status Register V (TCSRV) ...................................................... 154

11.3.5

Timer Control Register V1 (TCRV1) ............................................................... 155

11.4

Operation .......................................................................................................................... 156

11.4.1

Timer V Operation............................................................................................ 156

11.5

Timer V Application Examples ........................................................................................ 159

11.5.1

Pulse Output with Arbitrary Duty Cycle........................................................... 159

11.5.2

Pulse Output with Arbitrary Pulse Width and Delay from TRGV Input .......... 160

11.6

Usage Notes ...................................................................................................................... 161

Section 12 Timer Z ............................................................................................163

12.1

Features............................................................................................................................. 163

12.2

Input/Output Pins .............................................................................................................. 168

12.3

Register Descriptions ........................................................................................................ 169

12.3.1

Timer Start Register (TSTR) ............................................................................ 170

12.3.2

Timer Mode Register (TMDR) ......................................................................... 171

12.3.3

Timer PWM Mode Register (TPMR) ............................................................... 172

12.3.4

Timer Function Control Register (TFCR)......................................................... 173

12.3.5

Timer Output Master Enable Register (TOER) ................................................ 175

12.3.6

Timer Output Control Register (TOCR) ........................................................... 176

12.3.7

Timer Counter (TCNT)..................................................................................... 177

12.3.8

General Registers A, B, C, and D (GRA, GRB, GRC, and GRD).................... 178

12.3.9

Timer Control Register (TCR).......................................................................... 179

12.3.10

Timer I/O Control Register (TIORA and TIORC)............................................ 180

12.3.11

Timer Status Register (TSR)............................................................................. 182

12.3.12

Timer Interrupt Enable Register (TIER) ........................................................... 184

12.3.13

PWM Mode Output Level Control Register (POCR) ....................................... 185

12.3.14

Interface with CPU ........................................................................................... 186

12.4

Operation .......................................................................................................................... 187

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