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SH7261 Datasheet(PDF) 521 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 521 Page - Renesas Technology Corp |
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521 / 1348 page ![]() Section 12 Multi-Function Timer Pulse Unit 2 (MTU2) Rev. 2.00 Sep. 07, 2007 Page 489 of 1312 REJ09B0320-0200 (3) Phase Counting Mode Application Example: Figure 12.34 shows an example in which channel 1 is in phase counting mode, and channel 1 is coupled with channel 0 to input servo motor 2-phase encoder pulses in order to detect position or speed. Channel 1 is set to phase counting mode 1, and the encoder pulse A-phase and B-phase are input to TCLKA and TCLKB. Channel 0 operates with TCNT counter clearing by TGRC_0 compare match; TGRA_0 and TGRC_0 are used for the compare match function and are set with the speed control period and position control period. TGRB_0 is used for input capture, with TGRB_0 and TGRD_0 operating in buffer mode. The channel 1 counter input clock is designated as the TGRB_0 input capture source, and the pulse widths of 2-phase encoder 4-multiplication pulses are detected. TGRA_1 and TGRB_1 for channel 1 are designated for input capture, and channel 0 TGRA_0 and TGRC_0 compare matches are selected as the input capture source and store the up/down-counter values for the control periods. This procedure enables the accurate detection of position and speed. TCNT_1 TCNT_0 Channel 1 TGRA_1 (speed period capture) TGRA_0 (speed control period) TGRB_1 (position period capture) TGRC_0 (position control period) TGRB_0 (pulse width capture) TGRD_0 (buffer operation) Channel 0 TCLKA TCLKB Edge detection circuit + - + - Figure 12.34 Phase Counting Mode Application Example |
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