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SH7261 Datasheet(PDF) 1091 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 1091 Page - Renesas Technology Corp |
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1091 / 1348 page  Section 24 I/O Ports Rev. 2.00 Sep. 07, 2007 Page 1059 of 1312 REJ09B0320-0200 24.6.2 Port F Data Register (PFDR) PFDR is a 16-bit read-only register that stores the port F data. Bits PF7DR to PF0DR correspond to pins PF7 to PF0, respectively. If a pin is set to the general output function, the pin will output the value written to the corresponding bit in PFDR, and the register value is read from PFDR regardless of the state of the pin. If a pin is set to the general input function, the pin state, not the register value, will be returned if PFDR is read. Also, if a value is written to PFDR, although the value will actually be written, it will have no influence on the state of the pin. Table 24.11 summarizes the PFDR read/write operations. PFDR is initialized to H'0000 by a power-on reset or in deep standby mode. This register is not initialized either by a manual reset or by switching to sleep mode or software standby mode. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Bit: Initial value: R/W: 0000000000000000 R R R R R R R R R/W R/W R/W R/W R/W R/W R/W R/W ———————— PF7 DR PF6 DR PF5 DR PF4 DR PF3 DR PF2 DR PF1 DR PF0 DR Table 24.11 Port F Data Register (PFDR) Read/Write Operations PFIOR Pin Function Read Write 0 General input Pin state The value is written to PFDR but there is no effect on the pin state. Other than general input Pin state The value is written to PFDR but there is no effect on the pin state. 1 General output Value of PFDR The value written is output from the pin. Other than general output Value of PFDR The value is written to PFDR but there is no effect on the pin state. |
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