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SH7261 Datasheet(PDF) 1107 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 1107 Page - Renesas Technology Corp |
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1107 / 1348 page ![]() Section 25 Pin Function Controller (PFC) Rev. 2.00 Sep. 07, 2007 Page 1075 of 1312 REJ09B0320-0200 Bit Bit Name Initial Value R/W Description 10 to 8 PA26MD [2:0] 000 R/W PA26 Mode These bits control the function of the PA26/A26/ DACT3/PINT2B pin. 000: PA26 I/O (port) 001: A26 output (BSC) 010: DACT3 output (DMAC) 011: PINT2B input (INTC) 100: Setting prohibited 101: Setting prohibited 110: Setting prohibited 111: Setting prohibited 7 — 0 R Reserved This bit is always read as 0. The write value should always be 0. 6 to 4 PA25MD [2:0] 000 R/W PA25 Mode These bits control the function of the PA25/A25/ DACK3/PINT1B pin. 000: PA25 I/O (port) 001: A25 output (BSC) 010: DACK3 output (DMAC) 011: PINT1B input (INTC) 100: Setting prohibited 101: Setting prohibited 110: Setting prohibited 111: Setting prohibited 3, 2 — All 0 R Reserved These bits are always read as 0. The write value should always be 0. 1, 0 PA24MD [1:0] 00 R/W PA24 Mode These bits control the function of the PA24/A24/ DREQ3/PINT0B pin. 00: PA24 I/O (port) 01: A24 output (BSC) 10: DREQ3 input (DMAC) 11: PINT0B input (INTC) |
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