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SH7261 Datasheet(PDF) 1105 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 1105 Page - Renesas Technology Corp |
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1105 / 1348 page ![]() Section 25 Pin Function Controller (PFC) Rev. 2.00 Sep. 07, 2007 Page 1073 of 1312 REJ09B0320-0200 Bit Bit Name Initial Value R/W Description 9, 8 PA30MD [1:0] 00 R/W PA30 Mode These bits control the function of the PA30/CTx1/ DACT0 pin. 00: PA30 I/O (port) 01: CTx1 output (RCAN-ET) 10: DACT0 output (DMAC) 11: Setting prohibited 7, 6 — All 0 R Reserved These bits are always read as 0. The write value should always be 0. 5, 4 PA29MD [1:0] 00 R/W PA29 Mode These bits control the function of the PA29/CRx0/ DACK0 pin. 00: PA29 I/O (port) 01: CRx0 input (RCAN-ET) 10: DACK0 output (DMAC) 11: Setting prohibited 3, 2 — All 0 R Reserved These bits are always read as 0. The write value should always be 0. 1, 0 PA28MD [1:0] 00 R/W PA28 Mode These bits control the function of the PA28/CTx0/ DREQ0 pin. 00: PA28 I/O (port) 01: CTx0 output (RCAN-ET) 10: DREQ0 input (DMAC) 11: Setting prohibited |
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