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SH7261 Datasheet(PDF) 1119 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 1119 Page - Renesas Technology Corp |
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1119 / 1348 page ![]() Section 25 Pin Function Controller (PFC) Rev. 2.00 Sep. 07, 2007 Page 1087 of 1312 REJ09B0320-0200 Bit Bit Name Initial Value R/W Description 7 — 0 R Reserved This bit is always read as 0. The write value should always be 0. 6 to 4 PB25MD [2:0] 000/001* R/W PB25 Mode These bits control the function of the PB25/D25/ PINT1A/TIC5V/RxD6 pin. 000: PB25 I/O (port) 001: D25 I/O (BSC) 010: PINT1A input (INTC) 011: TIC5V input (MTU2) 100: RxD6 input (SCIF) 101: Setting prohibited 110: Setting prohibited 111: Setting prohibited 3 — 0 R Reserved This bit is always read as 0. The write value should always be 0. 2 to 0 PB24MD [2:0] 000/001* R/W PB24 Mode These bits control the function of the PB24/D24/ PINT0A/TIC5U/TxD6 pin. 000: PB24 I/O (port) 001: D24 I/O (BSC) 010: PINT0A input (INTC) 011: TIC5U input (MTU2) 100: TxD6 output (SCIF) 101: Setting prohibited 110: Setting prohibited 111: Setting prohibited Note: * The initial value depends on the LSI's operating mode. |
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