SH7615 datasheet(49/925 Pages) RENESAS

49 / 925 page

Rev. 2.00, 03/05, page 11 of 884

Item

Specifications

16-bit free-running

timer (FRT),

1 channel

• Choice of four counter input clocks

 Three internal clocks (Pφ/8, Pφ/32, Pφ/128)

 External clock (enabling external event counting)

• Two independent comparators (allowing generation of two waveform

outputs)

• Input capture (choice of rising edge or falling edge)

• Counter clear specification

 Counter value can be cleared by compare match A

• Four interrupt sources

 Two compare match sources (OCIA, OCIB)

 One input capture source (ICI)

 One overflow source (OVI)

Watchdog timer

(WDT), 1 channel

• Can be switched between watchdog timer mode and interval timer mode

• Internal reset, external signal (WDTOVF), or interrupt generated on count

overflow

• Used when standby mode is cleared or the clock frequency is changed,

and in clock pause mode

• Selection of eight counter input clocks

Clock pulse

generator (CPG)

• Built-in clock pulse generator

• Selection of crystal or external clock as clock source

• Built-in clock-multiplication PLL circuits

• Built-in PLL circuit for phase synchronization between external clock and

internal clock

• CPU/DSP core clock (Iφ), peripheral module clock (Pφ), and external

interface clock (E

φ) frequencies can be scaled independently

SH7615 Datasheet(PDF) 49 Page - Renesas Technology Corp