SH7615 datasheet(97/925 Pages) RENESAS

97 / 925 page

Rev. 2.00, 03/05, page 59 of 884

Each of the address pointers has an index register. The R8 register becomes the index register (Ix)

of the X memory address register (Ax), and the R9 register becomes the index register (Iy) of the

Y memory address register (Ay).

The X, Y data transfer instructions are processed in word lengths. X, Y data memory is accessed

in 16 bits. This is why the increment processing adds 2 to the address registers. In order to

decrement, set –2 in the index register and designate add index register addressing. During X, Y

data addressing, only bits 1 to 15 of the address pointer are valid. Always write a 0 to bit 0 of the

address pointer and the index register during X, Y data addressing.

Figure 2.9 shows the X, Y data transfer addressing. When X memory and Y memory are accessed

using the X, Y bus, the upper word of Ax (R4 or R5) and Ay (R6 or R7) is ignored. The result of

@Ay+ and @Ay+Iy is stored in the lower word of Ay, and the upper word retains its original

value.

ALU

AU*1

R8[Ix]

R4[Ax]

R5[Ax]

R9[Iy]

R6[Ay]

R7[Ay]

+2 (INC)

+0 (No update)

Notes:

All three addressing methods (increment, index register addition (Ix, Iy), and

no update) are post-updating methods. To decrement the address pointer, set

the index register to –2 or –4.

1. Adder added for DSP addressing.

Figure 2.9 X, Y Data Transfer Addressing

SH7615 Datasheet(PDF) 97 Page - Renesas Technology Corp