H83008 datasheet(39/686 Pages) RENESAS

39 / 686 page

Rev.4.00 Aug. 20, 2007, Page xxxix of xliv

REJ09B0395-0400

Tables

Section 1 Overview

Table 1.1

Features ..............................................................................................................

Table 1.2

Comparison of H8/3008 Pin Arrangements .......................................................

Table 1.3

Pin Functions......................................................................................................

Table 1.4

Pin Assignments in Each Mode (FP-100B, TFP-100B) ..................................... 12

Section 2 CPU

Table 2.1

Instruction Classification.................................................................................... 27

Table 2.2

Instructions and Addressing Modes ................................................................... 28

Table 2.3

Data Transfer Instructions .................................................................................. 30

Table 2.4

Arithmetic Operation Instructions ...................................................................... 31

Table 2.5

Logic Operation Instructions .............................................................................. 33

Table 2.6

Shift Instructions ................................................................................................ 33

Table 2.7

Bit Manipulation Instructions............................................................................. 34

Table 2.8

Branching Instructions........................................................................................ 36

Table 2.9

System Control Instructions ............................................................................... 37

Table 2.10

Block Transfer Instruction.................................................................................. 38

Table 2.11

Addressing Modes .............................................................................................. 41

Table 2.12

Absolute Address Access Ranges....................................................................... 42

Table 2.13

Effective Address Calculation ............................................................................ 44

Table 2.14

Exception Handling Types and Priority ............................................................. 48

Section 3 MCU Operating Modes

Table 3.1

Operating Mode Selection .................................................................................. 55

Table 3.2

Registers ............................................................................................................. 56

Table 3.3

Pin Functions in Each Mode............................................................................... 61

Section 4 Exception Handling

Table 4.1

Exception Types and Priority ............................................................................. 65

Table 4.2

Exception Vector Table...................................................................................... 67

Section 5 Interrupt Controller

Table 5.1

Interrupt Pins ...................................................................................................... 77

Table 5.2

Interrupt Controller Registers............................................................................. 77

Table 5.3

Interrupt Sources, Vector Addresses, and Priority ............................................. 89

Table 5.4

UE, I, and UI Bit Settings and Interrupt Handling ............................................. 92

Table 5.5

Interrupt Response Time .................................................................................... 98

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