HD6433045 datasheet(93/905 Pages) RENESAS

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Section 3 MCU Operating Modes

Rev. 7.00 Sep 21, 2005 page 69 of 878

REJ09B0259-0700

3.4

Operating Mode Descriptions

3.4.1

Mode 1

Ports 1, 2, and 5 function as address pins A19 to A0, permitting access to a maximum 1-Mbyte

address space. The initial bus mode after a reset is 8 bits, with 8-bit access to all areas. If at least

one area is designated for 16-bit access in ABWCR, the bus mode switches to 16 bits.

3.4.2

Mode 2

Ports 1, 2, and 5 function as address pins A19 to A0, permitting access to a maximum 1-Mbyte

address space. The initial bus mode after a reset is 16 bits, with 16-bit access to all areas. If all

areas are designated for 8-bit access in ABWCR, the bus mode switches to 8 bits.

3.4.3

Mode 3

Ports 1, 2, and 5 and part of port A function as address pins A23 to A0, permitting access to a

maximum 16-Mbyte address space. The initial bus mode after a reset is 8 bits, with 8-bit access to

all areas. If at least one area is designated for 16-bit access in ABWCR, the bus mode switches to

16 bits. A23 to A21 are valid when 0 is written in bits 7 to 5 of the bus release control register

(BRCR). (In this mode A20 is always used for address output.)

3.4.4

Mode 4

Ports 1, 2, and 5 and part of port A function as address pins A23 to A0, permitting access to a

maximum 16-Mbyte address space. The initial bus mode after a reset is 16 bits, with 16-bit access

to all areas. If all areas are designated for 8-bit access in ABWCR, the bus mode switches to 8 bits.

A23 to A21 are valid when 0 is written in bits 7 to 5 of BRCR. (In this mode A20 is always used for

address output.)

3.4.5

Mode 5

Ports 1, 2, and 5 can function as address pins A19 to A0, permitting access to a maximum 1-Mbyte

address space, but following a reset they are input ports. To use ports 1, 2, and 5 as an address bus,

the corresponding bits in their data direction registers (P1DDR, P2DDR, and P5DDR) must be set

to 1. The initial bus mode after a reset is 8 bits, with 8-bit access to all areas. If at least one area is

designated for 16-bit access in ABWCR, the bus mode switches to 16 bits.

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