R8C18 datasheet(85/257 Pages) RENESAS

85 / 257 page

R8C/18 Group, R8C/19 Group

10. Clock Generation Circuit

Rev.1.30

Apr 14, 2006

Page 70 of 233

REJ09B0222-0130

10.6

Notes on Clock Generation Circuit

10.6.1

Stop Mode and Wait Mode

When entering stop mode or wait mode, an instruction queue pre-reads 4 bytes from the WAIT

instruction or an instruction that sets the CM10 bit in the CM1 register to 1 (stops all clocks) before the

program stops. Therefore, insert at least four NOPs after the WAIT instruction or an instruction that

sets the CM10 bit to 1.

10.6.2

Oscillation Stop Detection Function

Since the oscillation stop detection function cannot be used if the main clock frequency is below 2

MHz, set bits OCD1 to OCD0 to 00b (oscillation stop detection function disabled) in this case.

10.6.3

Oscillation Circuit Constants

Ask the manufacturer of the oscillator to specify the best oscillation circuit constants for your system.

10.6.4

High-Speed On-Chip Oscillator Clock

The high-speed on-chip oscillator frequency may be changed up to 10%(1) in flash memory CPU

rewrite mode during auto-program operation or auto-erase operation.

The high-speed on-chip oscillator frequency after auto-program operation ends or auto-erase

operation ends is held the state before the program command or block erase command is generated.

Also, this note is not applicable when the read array command, read status register command, or

clear status register command is generated. The application products must be designed with careful

considerations for the frequency change.

NOTE:

1. Change ratio to 8 MHz frequency adjusted in shipping.

R8C18 Datasheet(PDF) 85 Page - Renesas Technology Corp