SH7049 datasheet(97/764 Pages) RENESAS

97 / 764 page

Rev. 2.00, 09/04, page 57 of 720

Section 5 Exception Processing

5.1

Overview

5.1.1

Types of Exception Processing and Priority

Exception processing is started by four sources: resets, address errors, interrupts and instructions

and have the priority, as shown in table 5.1. When several exception processing sources occur at

once, they are processed according to the priority.

Table 5.1

Types of Exception Processing and Priority

Exception

Source

Priority

Power-on reset

Reset

Manual reset

CPU address error and AUD address error*

Address

error

DTC address error

NMI

User break

H-UDI*

IRQ

Interrupt

On-chip peripheral

modules:

• Multifunction timer unit (MTU)

• A/D converter 0 and 1 (A/D0, A/D1)

• Data transfer controller (DTC)

• Compare match timer 0 and 1 (CMT0, CMT1)

• Watchdog timer (WDT)

• Input/output port (I/O) (MTU)

• Serial communication interface 2, 3, and 4 (SCI2,

SCI3, and SCI4)

• Motor management timer (MMT)

• Input/output port (I/O) (MMT)

• Controller area network 2 (HCAN 2)

Trap instruction (TRAPA instruction)

General illegal instructions (undefined code)

High

Instructions

Illegal slot instructions (undefined code placed directly after a delay

branch instruction*

2 or instructions that rewrite the PC*3)

Low

Notes: 1. For flash version only

2. Delayed branch instructions: JMP, JSR, BRA, BSR, RTS, RTE, BF/S, BT/S, BSRF, and

BRAF.

3. Instructions that rewrite the PC: JMP, JSR, BRA, BSR, RTS, RTE, BT, BF, TRAPA,

BF/S, BT/S, BSRF, and BRAF.

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