SH7049 datasheet(21/764 Pages) RENESAS

21 / 764 page

Rev. 2.00, 09/04, page xxi of xl

Section 22 High-Performance User Debugging Interface (H-UDI) .................581

22.1

Overview........................................................................................................................... 581

22.1.1 Features................................................................................................................ 581

22.1.2 Block Diagram..................................................................................................... 582

22.2

Input/Output Pins .............................................................................................................. 583

22.3

Register Description.......................................................................................................... 583

22.3.1 Instruction Register (SDIR) ................................................................................. 584

22.3.2 Status Register (SDSR)........................................................................................ 585

22.3.3 Data Register (SDDR) ......................................................................................... 586

22.3.4 Bypass Register (SDBPR) ................................................................................... 586

22.4

Operation .......................................................................................................................... 587

22.4.1 H-UDI Interrupt ................................................................................................... 587

22.4.2 Bypass Mode ....................................................................................................... 590

22.4.3 H-UDI Reset ........................................................................................................ 590

22.5

Usage Notes ...................................................................................................................... 590

Section 23 Advanced User Debugger (AUD)....................................................593

23.1

Overview........................................................................................................................... 593

23.1.1 Features................................................................................................................ 593

23.1.2 Block Diagram..................................................................................................... 594

23.2

Pin Configuration.............................................................................................................. 594

23.2.1 Pin Descriptions................................................................................................... 595

23.3

Branch Trace Mode........................................................................................................... 597

23.3.1 Overview.............................................................................................................. 597

23.3.2 Operation ............................................................................................................. 597

23.4

RAM Monitor Mode ......................................................................................................... 598

23.4.1 Overview.............................................................................................................. 598

23.4.2 Communication Protocol ..................................................................................... 599

23.4.3 Operation ............................................................................................................. 599

23.5

Usage Notes ...................................................................................................................... 601

23.5.1 Initialization ......................................................................................................... 601

23.5.2 Operation in Software Standby Mode.................................................................. 601

23.5.3 Setting the PA15/CK/

POE6/TRST/BACK pin....................................................601

23.5.4 Pin States ............................................................................................................. 601

23.5.5 AUD Activation Procedures ................................................................................ 602

Section 24 Power-Down Modes ........................................................................603

24.1

Input/Output Pins ............................................................................................................. 606

24.2

Register Descriptions ........................................................................................................ 606

24.2.1 Standby Control Register (SBYCR) .................................................................... 607

24.2.2 System Control Register (SYSCR) ...................................................................... 608

24.2.3 Module Standby Control Register 1 and 2 (MSTCR1 and MSTCR2)................. 609

24.3

Operation .......................................................................................................................... 611

SH7049 Datasheet(PDF) 21 Page - Renesas Technology Corp

SH7049 Datasheet(HTML) 21 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL