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SH7049 Datasheet(PDF) 22 Page - Renesas Technology Corp |
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SH7049 Datasheet(HTML) 22 Page - Renesas Technology Corp |
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22 / 764 page ![]() Rev. 2.00, 09/04, page xxii of xl 24.3.1 Sleep Mode .......................................................................................................... 611 24.3.2 Software Standby Mode....................................................................................... 611 24.3.3 Hardware Standby Mode ..................................................................................... 614 24.3.4 Module Standby Mode......................................................................................... 615 24.4 Usage Notes ...................................................................................................................... 615 24.4.1 I/O Port Status...................................................................................................... 615 24.4.2 Current Consumption during Oscillation Stabilization Wait Period.................... 616 24.4.3 On-Chip Peripheral Module Interrupt.................................................................. 616 24.4.4 Writing to MSTCR1 and MSTCR2 ..................................................................... 616 24.4.5 Handling of HSTBY Pin...................................................................................... 616 24.4.6 Electromagnetic Interference on HSTBY Pin...................................................... 616 24.4.7 DTC or AUD operation in Sleep Mode ............................................................... 617 Section 25 Electrical Characteristics ................................................................. 619 25.1 Absolute Maximum Ratings ............................................................................................. 619 25.2 DC Characteristics ............................................................................................................ 620 25.3 AC Characteristics ............................................................................................................ 623 25.3.1 Test Conditions for the AC Characteristics ......................................................... 623 25.3.2 Clock Timing ....................................................................................................... 624 25.3.3 Control Signal Timing ......................................................................................... 626 25.3.4 Bus Timing .......................................................................................................... 629 25.3.5 Multi-Function Timer Pulse Unit (MTU)Timing ................................................ 633 25.3.6 I/O Port Timing.................................................................................................... 634 25.3.7 Watchdog Timer (WDT)Timing.......................................................................... 635 25.3.8 Serial Communication Interface (SCI)Timing..................................................... 636 25.3.9 Motor Management Timer (MMT) Timing ......................................................... 638 25.3.10 Port Output Enable (POE) Timing....................................................................... 639 25.3.11 HCAN2 Timing ................................................................................................... 640 25.3.12 A/D Converter Timing......................................................................................... 641 25.3.13 H-UDI Timing ..................................................................................................... 642 25.3.14 AUD Timing........................................................................................................ 644 25.3.15 UBC Trigger Timing ........................................................................................... 646 25.4 A/D Converter Characteristics .......................................................................................... 647 25.5 Flash Memory Characteristics .......................................................................................... 648 Appendix A Internal I/O Register ..................................................................... 651 A.1 Register Addresses (Order of Address) ............................................................................ 651 A.2 Register Bits...................................................................................................................... 678 A.3 Register States in Each Operating Mode .......................................................................... 690 Appendix B Pin States....................................................................................... 698 Appendix C Product Code Lineup .................................................................... 702 |
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