SH7052 datasheet(491/919 Pages) RENESAS

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Table 14.8

Serial Mode Register Settings and SCI Communication Formats

SMR Settings

SCI Communication Format

Mode

Bit 7

Bit 6

CHR

Bit 5

Bit 2

Bit 3

STOP

Data

Length

Parity

Bit

Multipro-

cessor Bit

Stop Bit

Length

Asynchronous

00000

8-bit

Absent Absent

1 bit

2 bits

Present

1 bit

2 bits

7-bit

Absent

1 bit

2 bits

Present

1 bit

2 bits

Asynchronous

8-bit

Absent Present

1 bit

(multiprocessor

2 bits

format)

7-bit

1 bit

2 bits

Synchronous

****

8-bit

Absent

None

Note:

Asterisks (*) in the table indicate don’t care bits.

Table 14.9

SMR and SCR Settings and SCI Clock Source Selection

SMR

SCR Settings

SCI Transmit/Receive Clock

Mode

Bit 7

Bit 1

CKE1

Bit 0

CKE0

Clock Source

SCK Pin Function*

Asynchronous

Internal

SCI does not use the SCK pin

Outputs a clock with frequency

matching the bit rate

External

Inputs a clock with frequency 16

times the bit rate

Synchronous

Internal

Outputs the serial clock

or the inverted serial clock

External

Inputs the serial clock

or the inverted serial clock

Note: * Select the function in combination with the pin function controller (PFC).

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