SH7052 datasheet(494/919 Pages) RENESAS

494 / 919 page

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When the SCI operates on an internal clock, it can output a clock signal at the SCK pin. The

frequency of this output clock is equal to the bit rate. The phase is aligned as in figure 14.3 so that

the rising edge of the clock occurs at the center of each transmit data bit.

D0D1D2D3D4

0/1

1 frame

Figure 14.3 Output Clock and Communication Data Phase Relationship (Asynchronous

Mode)

Data Transmit/Receive Operation

SCI Initialization (Asynchronous Mode): Before transmitting or receiving, clear the TE and RE

bits to 0 in the serial control register (SCR), then initialize the SCI as follows.

When changing the operation mode or communication format, always clear the TE and RE bits to

0 before following the procedure given below. Clearing TE to 0 sets TDRE to 1 and initializes the

transmit shift register (TSR). Clearing RE to 0, however, does not initialize the RDRF, PER, FER,

and ORER flags and receive data register (RDR), which retain their previous contents.

When an external clock is used, the clock should not be stopped during initialization or subsequent

operation. SCI operation becomes unreliable if the clock is stopped.

Figure 14.4 is a sample flowchart for initializing the SCI. The procedure is as follows (the steps

correspond to the numbers in the flowchart):

1. Select the clock source in the serial control register (SCR). Leave RIE, TIE, TEIE, MPIE, TE

and RE cleared to 0. If clock output is selected in asynchronous mode, clock output starts

immediately after the setting is made in SCR.

2. Select the communication format in the serial mode register (SMR) and serial direction control

3. Write the value corresponding to the bit rate in the bit rate register (BRR) (unless an external

clock is used).

4. Wait for at least the interval required to transmit or receive one bit, then set TE or RE in the

serial control register (SCR) to 1.* Also set RIE, TIE, TEIE and MPIE as necessary. Setting

TE or RE enables the SCI to use the TxD or RxD pin.

Note: * In simultaneous transmit/receive operation, the TE bit and RE bit must be cleared to 0 or

set to 1 simultaneously.

SH7052 Datasheet(PDF) 494 Page - Renesas Technology Corp