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SH7052 Datasheet(PDF) 649 Page - Renesas Technology Corp |
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SH7052 Datasheet(HTML) 649 Page - Renesas Technology Corp |
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649 / 919 page ![]() 623 18.3.9 Port D Control Registers H and L (PDCRH, PDCRL) Port D control registers H and L (PDCRH, PDCRL) are 16-bit readable/writable registers that select the functions of the 14 multiplex pins in port D. PDCRH selects the functions of the pins for the upper 6 bits of port D, and PDCRL selects the functions of the pins for the lower 8 bits. PDCRH and PDCRL are initialized to H'0000 by a power-on reset (excluding a WDT power-on reset), and in hardware standby mode. They are not initialized in software standby mode or sleep mode. Port D Control Register H (PDCRH) Bit: 15 14 13 12 11 10 9 8 — — — — PD13 MD1 PD13 MD0 — PD12 MD Initial value: 0 0 0 0 0 0 0 0 R/W: R R R R R/W R/W R R/W Bit: 7 6 5 4 3 2 1 0 — PD11 MD — PD10 MD — PD9 MD — PD8 MD Initial value: 0 0 0 0 0 0 0 0 R/W: R R/W R R/W R R/W R R/W • Bits 15 to 12—Reserved: These bits always read 0. The write value should always be 0. • Bits 11 and 10—PD13 Mode Bits 1 and 0 (PD13MD1, PD13MD0): These bits select the function of pin PD13/PULS6/HTxD. Bit 11: PD13MD1 Bit 10: PD13MD0 Description 0 0 General input/output (PD13) (Initial value) 1 APC pulse output (PULS6) 1 0 HCAN transmit data output (HTxD) 1 Reserved (Do not set) • Bit 9—Reserved: This bit always reads 0. The write value should always be 0. |
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