SH7052 datasheet(744/919 Pages) RENESAS

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20.8.2

Software Protection

Software protection can be implemented by setting the SWE1 bit in FLMCR1, erase block register

1 (EBR1), erase block register 2 (EBR2), and the RAMS bit in the RAM emulation register

(RAMER). When software protection is in effect, setting the P1 or E1 bit in flash memory control

20.11.)

Table 20.11 Software Protection

Functions

Item

Description

Program

Erase

SWE bit protection

• Setting bit SWE1 in FLMCR1 to 0 sets the

program/erase-protected state. (Execute

the program in the on-chip RAM, external

memory.)

Yes

Block specification

protection

• Erase protection can be set for individual

blocks by settings in erase block register 1

(EBR1) and erase block register 2 (EBR2).

• Setting EBR1 and EBR2 to H'00 places all

blocks in the erase-protected state.

—

Yes

Emulation protection •

Setting the RAMS bit to 1 in the RAM

emulation register (RAMER) places all

blocks in the program/erase-protected

state.

Yes

20.8.3

Error Protection

In error protection, an error is detected when SH7052F/SH7053F runaway occurs during flash

memory programming/erasing, or operation is not performed in accordance with the

program/erase algorithm, and the program/erase operation is aborted. Aborting the program/erase

operation prevents damage to the flash memory due to overprogramming or overerasing.

If the SH7052F/SH7053F malfunctions during flash memory programming/erasing, the FLER bit

is set to 1 in FLMCR2 and the error protection state is entered. The FLMCR1, FLMCR2, EBR1,

and EBR2 settings are retained, but program mode or erase mode is aborted at the point at which

the error occurred. Program mode or erase mode cannot be re-entered by re-setting the P1 or E1

bit. However, PV1 and EV1 bit setting is enabled, and a transition can be made to verify mode.

FLER bit setting conditions are as follows:

1. When the flash memory of the relevant address area is read during programming/erasing

(including vector read and instruction fetch)

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