 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
SH7052 Datasheet(PDF) 813 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
SH7052 Datasheet(HTML) 813 Page - Renesas Technology Corp |
|
|
813 / 919 page  787 Section 22 RAM 22.1 Overview The SH7052F has 12 kbytes of on-chip RAM, SH7053F and SH7054F each have 16 kbytes, of on-chip RAM. The on-chip RAM is linked to the CPU, direct memory access controller (DMAC), and advanced user debugger (AUD) with a 32-bit data bus (figure 22.1). The CPU, DMAC, and AUD can access data in the on-chip RAM in 8, 16, or 32 bit widths. On- chip RAM data can always be accessed in one state, making the RAM ideal for use as a program area, stack area, or data area, which require high-speed access. The contents of the on-chip RAM are held in both the sleep and software standby modes. When the RAME bit (see below) is cleared to 0, the on-chip RAM contents are also held in hardware standby mode. The on-chip RAM of SH7052F is allocated to addresses H'FFFF8000 to H'FFFFAFFF.Each on- chip RAM of SH7053F and SH7054F is allocated to address H'FFFF8000 to H'FFFFBFFF |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
