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SH7052 Datasheet(PDF) 817 Page - Renesas Technology Corp |
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SH7052 Datasheet(HTML) 817 Page - Renesas Technology Corp |
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817 / 919 page ![]() 791 Section 23 Power-Down State 23.1 Overview Three modes are provided as power-save modes, namely, the hardware standby, software standby and sleep modes. Also, a module stop function is available to stop some modules. These standby modes can be selected depending on applications to reduce the power consumption of the SH7052F/SH7053F/SH7054F. 23.1.1 Power-Down States The power-down state is effected by the following modes: 1. Hardware standby mode A transition to hardware standby mode is made according to the input level of the RES and HSTBY pins. In hardware standby mode, all SH7052F/SH7053F/SH7054F functions are halted. This state is exited by means of a power-on reset. 2. Software standby mode A transition to software standby mode is made by means of software (a CPU instruction). In software standby mode, all SH7052F/SH7053F/SH7054F functions are halted. This state is exited by means of a power-on reset or an NMI interrupt. 3. Sleep mode A transition to sleep mode is made by means of a CPU instruction. In software standby mode, basically only the CPU is halted, and all on-chip peripheral modules operate. This state is exited by means of a power-on reset, a manual reset, interrupt, or DMA address error. 4. Module standby mode Operation of the on-chip peripheral modules* which can be placed in a standby mode can be stopped by stopping the clock supply. Clock supply to the individual modules can be controlled by setting bits in the module standby control register (MSTCR). Note: * AUD, H-UDI, and UBC |
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