SH7052 datasheet(820/919 Pages) RENESAS

820 / 919 page

794

23.2

23.2.1

Standby Control Register (SBYCR)

The standby control register (SBYCR) is an 8-bit readable/writable register that sets the transition

to standby mode, and the port state in standby mode. SBYCR is initialized to H'1F by a power-on

reset.

Bit:

SSBY

HIZ

—

Initial value:

R/W:

R/W

• Bit 7—Software Standby (SSBY): Specifies transition to software standby mode. The SSBY

bit cannot be set to 1 while the watchdog timer is running (when the timer enable bit (TME) in

the WDT timer control/status register (TCSR) is set to 1). To enter software standby mode,

always halt the WDT by clearing the TME bit to 0, then set the SSBY bit.

Bit 7: SSBY

Description

Executing SLEEP instruction puts the SH7052F/SH7053F/SH7054F into sleep

mode

(Initial value)

Executing SLEEP instruction puts the SH7052F/SH7053F/SH7054F into

standby mode

• Bit 6—Port High Impedance (HIZ): In software standby mode, this bit selects whether to set

I/O port pins to high impedance or hold the pin state. The HIZ bit cannot be set to 1 when the

TME bit of the WDT timer control/status register (TCSR) is set to 1. When making the I/O

port pin state high impedance, always clear the TME bit to 0 before setting the HIZ bit.

Bit 6: HIZ

Description

Pin states held in software standby mode

(Initial value)

Pins go to high impedance in software standby mode

• Bit 5—Reserved: This bit always reads 0. The write value should always be 0.

• Bits 4 to 0—Reserved: These bits always read 1. The write value should always be 1.

SH7052 Datasheet(PDF) 820 Page - Renesas Technology Corp