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SH7243 Datasheet(PDF) 622 Page - Renesas Technology Corp |
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SH7243 Datasheet(HTML) 622 Page - Renesas Technology Corp |
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622 / 1726 page  Section 11 Multi-Function Timer Pulse Unit 2 (MTU2) Rev. 1.00 Jun. 26, 2008 Page 592 of 1692 REJ09B0393-0100 TGCR UF bit VF bit WF bit TIOC3B pin TIOC3D pin TIOC4A pin TIOC4C pin TIOC4B pin TIOC4D pin 6-phase output When BDC = 1, N = 1, P = 1, FB = 1, output active level = high Figure 11.72 Example of Output Phase Switching by Means of UF, VF, WF Bit Settings (2) (r) A/D Converter Start Request Setting In complementary PWM mode, an A/D converter start request can be issued using a TGRA_3 compare-match, TCNT_4 underflow (trough), or compare-match on a channel other than channels 3 and 4. When start requests using a TGRA_3 compare-match are specified, A/D conversion can be started at the crest of the TCNT_3 count. A/D converter start requests can be set by setting the TTGE bit to 1 in the timer interrupt enable register (TIER). To issue an A/D converter start request at a TCNT_4 underflow (trough), set the TTGE2 bit in TIER_4 to 1. |
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