SH7243 datasheet(95/1726 Pages) RENESAS

95 / 1726 page

Section 3 MCU Operating Modes

Rev. 1.00 Jun. 26, 2008 Page 65 of 1692

REJ09B0393-0100

3.4

Address Map

The address map for the operating modes is shown in figure 3.1 to 3.7.

On-chip RAM (32 Kbytes)

On-chip peripheral

I/O registers

SDRAM mode setting space

On-chip RAM (32 Kbytes)

On-chip peripheral

I/O registers

SDRAM mode setting space

CS0 space

CS1 space

CS2 space

CS3 space

CS4 space

CS5 space

CS6 space

CS7 space

CS0 space

CS1 space

CS2 space

CS3 space

CS4 space

CS5 space

CS6 space

CS7 space

On-chip ROM (1024 Kbytes)

H'0000 0000

H'0200 0000

H'01FF FFFF

H'03FF FFFF

H'000F FFFF

H'07FF FFFF

H'0400 0000

H'0010 0000

H'0800 0000

H'0BFF FFFF

H'0C00 0000

H'0FFF FFFF

H'1000 0000

H'2000 0000

H'13FF FFFF

H'1400 0000

H'17FF FFFF

H'1800 0000

H'1BFF FFFF

H'1C00 0000

H1FFF FFFF

Reserved area

H'0000 0000

H'000F FFFF

H'0010 0000

Reserved area

H'FFFC FFFF

Reserved area

H'FFFD 0000

H'FFFB FFFF

H'FFFC 0000

H'0000 0000

H'03FF FFFF

H'07FF FFFF

H'0400 0000

H'0800 0000

H'0BFF FFFF

H'0C00 0000

H'0FFF FFFF

H'1000 0000

H'13FF FFFF

H'1400 0000

H'17FF FFFF

H'1800 0000

H'1BFF FFFF

H'1C00 0000

H'1FFF FFFF

H'2000 0000

Reserved area

H'FFF8 7FFF

H'FFF8 8000

H'FFF7 FFFF

H'FFF8 0000

H'FFFD FFFF

H'FFFE 0000

H'FFFF FFFF

Reserved area

H'FFFC FFFF

H'FFFD 0000

H'FFFB FFFF

H'FFFC 0000

H'FFF8 7FFF

H'FFF8 8000

H'FFF7 FFFF

H'FFF8 0000

H'FFFD FFFF

H'FFFE 0000

H'FFFF FFFF

On-chip RAM (32 Kbytes)

On-chip peripheral

I/O registers

Reserved area

H'FFF8 7FFF

H'FFF8 8000

H'FFF7 FFFF

H'FFF8 0000

H'FFFD FFFF

H'FFFE 0000

H'FFFF FFFF

Modes 0 and 1

On-chip ROM disabled mode

Mode 2

On-chip ROM enabled mode

Mode 3

Single chip mode

Figure 3.1 SH7286F (1 MB) Address Map for Each Operating Mode

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