SH7243 datasheet(28/1726 Pages) RENESAS

28 / 1726 page

Rev. 1.00 Jun. 26, 2008 Page xxviii of xxx

Section 28 Power-Down Modes........................................................................ 1493

28.1

Features........................................................................................................................... 1493

28.1.1

Power-Down Modes ....................................................................................... 1493

28.1.2

Reset ............................................................................................................... 1494

28.2

Input/Output Pins............................................................................................................ 1495

28.3

Register Descriptions...................................................................................................... 1496

28.3.1

Standby Control Register (STBCR)................................................................ 1497

28.3.2

Standby Control Register 2 (STBCR2)........................................................... 1498

28.3.3

Standby Control Register 3 (STBCR3)........................................................... 1499

28.3.4

Standby Control Register 4 (STBCR4)........................................................... 1501

28.3.5

Standby Control Register 5 (STBCR5)........................................................... 1502

28.3.6

Standby Control Register 6 (STBCR6)........................................................... 1503

28.3.7

System Control Register 1 (SYSCR1) ............................................................ 1505

28.3.8

System Control Register 2 (SYSCR2) ............................................................ 1507

28.4

Operation ........................................................................................................................ 1509

28.4.1

Sleep Mode ..................................................................................................... 1509

28.4.2

Software Standby Mode.................................................................................. 1510

28.4.3

Module Standby Function............................................................................... 1512

Section 29 User Debugging Interface (H-UDI)................................................. 1513

29.1

Features........................................................................................................................... 1513

29.2

Input/Output Pins............................................................................................................ 1514

29.3

Register Descriptions...................................................................................................... 1515

29.3.1

Bypass Register (SDBPR) .............................................................................. 1515

29.3.2

Instruction Register (SDIR) ............................................................................ 1515

29.4

Operation ........................................................................................................................ 1517

29.4.1

TAP Controller ............................................................................................... 1517

29.4.2

Reset Configuration ........................................................................................ 1518

29.4.3

TDO Output Timing ....................................................................................... 1518

29.4.4

H-UDI Reset ................................................................................................... 1519

29.4.5

H-UDI Interrupt .............................................................................................. 1519

29.5

Usage Notes .................................................................................................................... 1520

Section 30 List of Registers............................................................................... 1521

30.1

(by functional module, in order of the corresponding section numbers) ........................ 1522

30.2

Register Bits ................................................................................................................... 1545

30.3

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