SH7243 datasheet(152/1726 Pages) RENESAS

152 / 1726 page

Section 6 Interrupt Controller (INTC)

Rev. 1.00 Jun. 26, 2008 Page 122 of 1692

REJ09B0393-0100

6.3

The INTC has the following registers. These registers are used to set the interrupt priorities and

control detection of the external interrupt input signal.

Table 6.2

Abbreviation

R/W

Initial

Value

Address

Access

Size

Interrupt control register 0

ICR0

R/W

H'FFFE0800

16, 32

Interrupt control register 1

ICR1

R/W

H'0000

H'FFFE0802

16, 32

IRQ interrupt request register

IRQRR

R/(W)*

H'0000

H'FFFE0806

16, 32

Bank control register

IBCR

R/W

H'0000

H'FFFE080C

16, 32

Bank number register

IBNR

R/W

H'0000

H'FFFE080E

16, 32

Interrupt priority register 01

IPR01

R/W

H'0000

H'FFFE0818

16, 32

Interrupt priority register 02

IPR02

R/W

H'0000

H'FFFE081A

16, 32

Interrupt priority register 05

IPR05

R/W

H'0000

H'FFFE0820

16, 32

Interrupt priority register 06

IPR06

R/W

H'0000

H'FFFE0C00

16, 32

Interrupt priority register 07

IPR07

R/W

H'0000

H'FFFE0C02

16, 32

Interrupt priority register 08

IPR08

R/W

H'0000

H'FFFE0C04

16, 32

Interrupt priority register 09

IPR09

R/W

H'0000

H'FFFE0C06

16, 32

Interrupt priority register 10

IPR10

R/W

H'0000

H'FFFE0C08

16, 32

Interrupt priority register 11

IPR11

R/W

H'0000

H'FFFE0C0A

16, 32

Interrupt priority register 12

IPR12

R/W

H'0000

H'FFFE0C0C

16, 32

Interrupt priority register 13

IPR13

R/W

H'0000

H'FFFE0C0E

16, 32

Interrupt priority register 14

IPR14

R/W

H'0000

H'FFFE0C10

16, 32

Interrupt priority register 15

IPR15

R/W

H'0000

H'FFFE0C12

16, 32

Interrupt priority register 16

IPR16

R/W

H'0000

H'FFFE0C14

16, 32

Interrupt priority register 17

IPR17

R/W

H'0000

H'FFFE0C16

16, 32

Interrupt priority register 18

IPR18

R/W

H'0000

H'FFFE0C18

16, 32

USB-DTC transfer interrupt

request register

USDTENDRR

R/(W)*

H'0000

H'FFFE0C50

16, 32

Notes: Two access cycles are needed for word access, and four access cycles for longword

access.

1. When the NMI pin is high, becomes H'8000; when low, becomes H'0000.

2. Only 0 can be written after reading 1, to clear the flag.

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